Jacinto 6 ‘Eco’ brings high-end infotainment features to entry segment
The DRA72x comes with a selection of hardware media accelerators: The IVA-HD video co-processor can decode H.264 1080p resolution at 60 fps, which enables standard multimedia simultaneously streaming from internal sources as well as from smartphones brought into the vehicle. In addition, the integrated digital signal processor can run software for Acoustic Noise Cancellation (ANC), speech enhancement and audio post-processing.
The DRA72x stays true to TI’s automotive SoC approach of the Jacinto family including ARM Cortex-M4 to offload the main ARM Cortex-A15 CPU from real-time, interrupt intensive tasks, as well as vehicle connectivity peripherals including DCAN, Ethernet AVB, MOST Media Local Bus (MLB), PCIe, and USB2.0 and 3.0. The chip also works with TI’s WiLink™ 8Q Wi-Fi, Bluetooth and GNSS combo connectivity family, creating out-of-the box ready automotive infotainment offering.
Developed on the same architecture as other members of TI’s Jacinto 6 platform, the DRA72x processor enables manufacturers to scale product investments and deliver a diverse portfolio of products with software and hardware compatibility with the broadest array of ARM Cortex-A15 devices. The addition of the “Jacinto 6 Eco” family creates a processor portfolio that includes single- and dual-core ARM Cortex-A15 configurations with a range of 2,800 to more than 10,000 Dhrystone million instruction per second (DMIPS), single- and dual-core Imagination Technologies’ POWERVR SGX544-MPx graphics cores and automotive peripherals. Further scalability is achieved with processor variations having single and dual external memory interfaces and different CPU clock speeds.
The Jacinto 6 Eco processor enables car manufacturers to reduce the overall cost to customers with integrated acceleration capabilities, auto peripherals and software availability. The integrated DSP provides a simplified and cost-reduced multi-tuner radio solution for AM/FM/RDS, HD Radio, DAB, and/or DRM. The on-chip auxiliary CPUs (ARM Cortex-M4s) offload the main CPU of real-time, highly interrupted intensive tasks to increase software performance. The “Jacinto 6 Eco” tools, software and ecosystem, including QNX, Linux and Android high-level operating systems, are available to customers to ease design and reduce time to market.
Related links and articles:
Jacinto 5 powers Audi high-end infotainment system
Bridging the chasm between HTML5 and the hardware with PPS messaging
WiLink 8Q RF chip family combines multiple RF technologies for in-car use
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