Japan is planning to work with the United States to create domestic manufacturing for 2nm integrated circuits in the 2025 fiscal year, according to a Nikkei report.
The move is based on a recently signed bilateral chip technology partnership. Japan’s Ministry of Economy, Trade and Industry (METI) will subsidize some of the R&D costs and capital expenditures. One or multiple fabs could be built based on joint ventures between US and Japanese companies or Japanese companies working independently, the report said.
Joint research is set to begin in 3Q22 with Japan establishing a center for R&D and mass production between 2025 and 2027.
Foundry Taiwan Semiconductor Manufacturing Co. Ltd (TSMC) is the world’s leading chip manufacturer and is looking to start sampling its nominal 2nm N2 process in 2024 with mass production in 2025. TSMC’s N2 is based on a move away from FinFETs to so-called nanosheet transistors.
Japan is eager to reinvigorate its semiconductor sector, which has suffered at the hands of competition from South Korean and Taiwanese firms.
TSMC’s Liu not concerned
TSMC chairman Mark Lui, speaking at a recent shareholders’ meeting said TSMC is not concerned about US-Japan cooperation and it is good they should be developing “backup” to TSMC’s technology.
Besides being the next platform for smartphones, the 2nm technology will be important for high-performance computing in data centers, quantum computers. Japan’s move to bolster its domestic manufacturing for strategic reasons is the latest is a series of similar moves by major countries and regions of the world.
The US, as well as being home to Intel and Globalfoundries, has received inward investment in manufacturing from TSMC and Samsung (see Reports: TSMC planning for six wafer fabs in Arizona and Samsung choses Austin for $17bn 3nm fab).
In Japan TSMC was persuaded to put down a wafer fab in Kumamoto prefecture in support of one of its largest customers there (see Sony to invest US$500 million in TSMC wafer deal). However, the TSMC Japan wafer fab is only intended to produce chips with technology ranging from 10nm to 20nm.
While Europe has, so far, been unable to persuade TSMC to invest it has attracted Intel (see Intel to get 40% subsidy for German wafer fabs). However, it is notable that Intel’s leading-edge fabs in Magdeburg Germany, capable of 2nm production, are not expected to start production before 2027. By virtue of its impending acquisition of foundry Tower Semiconductor Ltd. Intel is also preparing to set up manufacturing in India. This is set to bring production behind the leading edge.
The first meeting of the Japan-U.S. Commercial and Industrial Partnership (JUCIP) was held on May 4, 2022. At the meeting US Secretary of Commerce Gina M. Raimondo and Japan Economic Minister Hagiuda Koichi signed the Basic Principles of Semiconductor Cooperation outlining the intention to cooperate on diversifying semiconductor production capacity, coordinating emergency response on shortages, and strengthening semiconductor R&D and workforce development.
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