JEDEC publishes Wide I/O mobile DRAM standard enabling chip-level 3D stacking with TSVs
Wide I/O mobile DRAM enables chip-level three dimensional (3D) stacking with Through Silicon Via (TSV) interconnects and memory chips directly stacked upon a System on a Chip (SoC). The standard defines features, functionalities, AC and DC characteristics, and ball/signal assignments. It is particularly well-suited for applications requiring extreme power efficiency and increased memory bandwidth (up to 17GBps). Examples include 3D Gaming, HD Video (1080p H264 video, pico projectors), and running multiple applications simultaneously. Wide I/O offers twice the bandwidth of the previous generation standard, LPDDR2, at the same rate of power consumption.
Sophie Dumas, Chairman of the JC-42.6 Subcommittee for Low Power Memories, said, “High performance mobile devices such as smartphones and tablets require high bandwidth and density, driven by demands for improved performance.” She added, “JEDEC’s JC-42.6 Subcommittee is pleased to provide a solution to this industry need with the publication of JESD229 for Wide I/O mobile DRAM, which will support the high resolution display, high quality graphics and multi-tasking capabilities required by device end users now and in the future.”
JESD229 may be downloaded free of charge from the JEDEC website at https://www.jedec.org/sites/default/files/docs/JESD229.pdf.
Visit JEDEC at www.jedec.org
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