JTAG debug tool takes control of MicroCores for PCB test and debug
For the electronics test engineer this can, at best, be ‘frustrating’ as they look to employ alternative methods for testing the ’processor and/or associated cluster/peripheral components. CoreCommander routines are ideal for diagnosing faults on ‘dead-kernel’ boards in either design debug or repair, since no on-board code is required to set memory reads and writes. Boundary-scan deficient parts can also be better utilised during production test, as CoreCommander-driven functions increase fault coverage. Since CoreCommander is Python-based it complements perfectly the JTAGLive Script product, allowing access to mixed-signal parts such as ADCs and DACs and also synchronised testing to full boundary-scan devices. The solutions, available now, take control of key processor core functions using the built-in emulation/debug functions of the ‘processor core and are designed by test engineers for use by test engineers. JTAG CoreCommander products are quick to learn and easy to use due to the dual modes of operation, namely ‘Interactive’ or ‘Python embedded’. Interactive mode allows the user to select a supported device within a design and ‘manually’ select register access commands or full memory reads and memory writes from the interactive window and via a supported controller to the target design. Sequences of commands can be exported from the interactive window and replayed as part of a Python script. Python-embedded mode uses a similar structure to that featured in the JTAGLive Script product, allowing CoreCommander functions to be embedded into Python code to create re-usable test modules for specific tests.
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