Kalman filter acceleration IP core targets ADAS
The Kalman filter acceleration IP core provides an estimated speed improvement over software-only solutions of up to 10x.
Kalman filtering is used in sensor-based ADAS as part of the radar tracker in order to smooth out position and velocity measurements obtained from the radar sensors and front-end DSP unit. The development of this IP core follows the guidelines necessary for integration with devices adhering to the ISO 26262 functional safety standard for road vehicles. It supports both classical Kalman filtering (KF) and extended Kalman filtering (EKF), the latter being applicable when there is a non-linear relationship between the target’s Kalman state and the radar measurements.
The low gate-count architecture of EnSilica’s Kalman Filter acceleration IP core enables the computationally intensive matrix operations involved in Kalman filtering to be cost-effectively offloaded from the CPU. It operates on Range (distance), Doppler (velocity) and Azimuth (positional) measurements and applies Kalman filtering in order to predict the target’s position in the next time interval. It combines the radar measurements with a dynamic motion model for enhancing the target position and velocity estimates with forward prediction, allowing false alarm measurements to be discarded. The Kalman Filter acceleration IP core also provides a generic algorithm framework for fusing measurements from different sensors into a single target track.
For a typical automotive radar system, the new IP core can provide a state update computation in about 10µs. This enables a large number of target tracks to be maintained at any given time, as this level of processing latency is very short compared to a usual radar measurement cycle, which is in the order of a few milliseconds. The core undertakes five main computational steps – setting the initial values, prediction of the state and error co-variance, computation of the Kalman gain, computation of the estimate and computation of the error co-variance – using floating point arithmetic in order to maintain numerical stability and provide identical results to a software implementation. RAM blocks of typically 8Kbits, depending on the matrix dimensions, are used to hold the computational matrices.
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