Lattice claims lowest cost per I/O FPGA with MachXO3-9400
Built in response to customer demand, the new devices bring expanded I/O and logic support for control PLD applications, while increased on-chip memory improves picture clarity for low cost video bridging in large monitor applications. The MachXO3 family targets the server, communications, industrial and display markets.
The new enhanced features of the MachXO3 family make it ideally suited for implementing control path functions. These include a glue-less 1V I/O interface for out-of-band communication with new, leading-edge processors; hitless I/O enables in-system hardware upgrade along with a switch over from its old configuration to the newly programmed configuration without interrupting the circuit board operation; password protection makes the system more robust against malicious erase commands. The SED/SEC/SEI feature enables recovery from a soft error event in milliseconds. Adding analog I/Os is simple and enables integration of all hardware management while reducing overall cost. Fast 900 Mbps operating speeds supported by MachXO3-9400 FPGA’s I/Os ensures that even high-resolution video streams operate smoothly.
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