Lattice unveils 4 x 3.125-Gbps SRIO capability on its ECP3 FPGA family
New Products
|
By
eeNews Europe
The core can be demonstrated utilizing the industry standard Lattice Advanced Mezzanine Card (AMC) form factor platform. With this announcement, Lattice demonstrates its continued leadership in mid-range FPGAs, supporting all lane configurations/rates of high speed serial protocols such as Level 1 SRIO.
The Serial RapidIO 2.1 IP core and associated AMC platform are available for immediate customer evaluation and use.
More information about the Serial RapidIO 2.1 IP core at www.latticesemi.com/products/intellectualproperty/ipcores/srio.cfm.
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
