Leti combines nine research tracks for sustainable electronics  

Leti combines nine research tracks for sustainable electronics  
Technology News |
CEA-Leti in France identifies resistive memories, 3D stacking, in-memory-computing, neuromorphic computing and quantum computing as well as edge computing and 6G wireless as key for reducing energy consumption in electronic systems
By Nick Flaherty


French research group CEA-Leti has identified nine areas for sustainable electronics that will be key to reducing the carbon footprint of the industry over the next decade. The aim is to improve energy efficiency in microelectronic hardware and systems by a factor of 1,000 by 2030 to tackle a predicted explosion in data centre power consumption.

Market research from IDC showed that electronic systems generated more than 64 zettabytes of data in 2020, a figure that is expected to exceed 2,000 zettabytes by 2035.

“This escalation results from the fact that data is increasingly generated by machines, while in 2018, only 44 percent of the data was produced by humans. It is expected that by 2022, 90 percent of all the data will be generated by machines (machine-to-machine communications) and by hundreds of billions of connected objects around the world” says the report.

The next generation of 6G networks will potentially add to this data deluge adn be a challenge for sustainable electronics. “6G networks will have to address the need for greater performance but not at any price” said Jean-René Lèquepeys, CTO of CEA-Leti.

An eight-page paper to be presented at the European Solid-State Device Research Conference (ESSDERC) and the European Solid-State Circuits Conference (ESSCIRC) this week suggests working simultaneously on five specific technology levels: process steps, circuits, architecture, software and algorithms.

“Until 2023, the power consumption of data centers should remain stable at around 200 TWh but, with the slowing down of scaling benefits, we could see an exponential growth in their energy consumption as early as 2024, unless new technological innovations come into play,” say the researchers. “This exponential increase in energy consumption would not be sustainable.”  

Future significant power savings will rely on improved fabrication processes, such as scaling, 3D integration and packaging, and on new computing architectures for edge applications to limit the amount of data that is sent to data cetnres for processing.

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“The entire ICT ecosystem, from microelectronics, software and hardware designers to developers, producers, manufacturers and integrators, is facing an immense new environmental challenge: to cope with the data deluge and to reduce drastically the energy consumption of digital technologies,” said Lèquepeys.

The research areas for sustainable electronics cover resistive memories, 3D stacking and new computing paradigms, such as in-memory-computing, neuromorphic computing and quantum computing as well as materials. This will require more cooperation between researchers to optimize applications and algorithms, algorithms and Integrated Circuit (IC) architectures, IC architectures and technologies.

“We also propose to perform data-processing operations as closely as possible to the source, in order to curtail the energy consumption that comes with data transport between couputing and storage units,” the paper says. “Finally, finding strategies to reduce the use of water and alternatives to rare or difficult to recycle  materials  is an ecological emergency. Possible conflits between countries due to minerals scarcity are a direct threat to our industry.” said Lèquepeys.

Next: Research for sustainable electronics

Edge computing with processing data close to the source will help to limit the use of cloud computing and help ensure data security. It also would significantly reduce energy consumption.

The research areas include developing new electronic architectures using dedicated but versatile accelerators with optimized power consumption in a wide range of applications as well as demonstrators based on active silicon interposers, chiplets and a 3D toolbox. Co-designing semiconductor processes and novel 3D electronic architectures can help improve computing performance significantly.

Dedicated ASIC + AI designs that move less data and lower power consumption and in-memory computing and near-memory processing will require enhanced software and EDA tools.

Another area is to explore using non-volatile memories for neuromorphic chips that can deploy on-chip learning algorithms and a smart in-memory computing approach.

Quantum computing is also key, including low-temperature CMOS technology for qubit control and readout, packaging based on a silicon interposer that can host qubits and electronics, and suitable error-correction codes.

“There is an urgent need to take into account and address the increase in worldwide energy and rare-material consumption required to produce and operate digital technologies, and to orient worldwide R&D activities more and more towards sustainable electronics,” says the paper. “Indeed, Europe is calling for a concerted effort to boost its capabilities in these key technologies, since they are enablers for other technological developments and provide a competitive edge to the European industry.”

Ealier this year, CEA-Leti launched the NEW-6G initiative across the European telecom and semiconductor community to lay the groundwork for future 6G wireless networks.


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