The development platform enables designers to add high-performance USB 3.0 throughput to virtually any system. Cypress says. It is based on Cypress’s programmable EZ-USB FX3 USB 3.0 peripheral controller.
EZ-USB FX3 is positioned as the industry’s only programmable USB 3.0 peripheral controller. It is equipped with a configurable General Programmable Interface (GPIF II), which can be programmed in 8-, 16-, and 32-bit configurations. GPIF II allows FX3 to communicate directly with application processors, FPGAs, storage media, and image sensors and provides a data transfer rate of up to 400 Megabytes per second, while using lower power than alternative solutions. The SuperSpeed Explorer Kit easily interfaces with external devices via three accessory boards that connect to Aptina image sensors, Altera FPGAs and Xilinx FPGAs, respectively. The kit also includes an integrated debugger with a standard USB interface to further simplify designs and speed time to market.
Cypress is also referring designers to the book “SuperSpeed Device Design by Example” by USB expert John Hyde at IDF. “I have been working with many of Cypress’s FX3 customers and wrote my book to address their most common concern of ‘getting started,’” said Hyde, who’s also a principal at USB Design By Example. “The book covers the end-to-end development process including Windows examples, FX3 firmware examples, GPIF II examples, and even Verilog examples for a CPLD plug-on board that enables you to try a variety of high-performance interfaces to your own hardware. I wanted to make SuperSpeed USB technology more accessible and believe that the book, along with the new Cypress kit, is a good first step in that direction.”
EZ-USB FX3 provides SuperSpeed USB 3.0 connectivity; the on-chip ARM9 CPU core with 512 kB RAM delivers 200 MIPS and is available for applications that require local data processing. Additionally, FX3 provides SPI, UART, I2C and I2S interfaces to connect to serial peripherals. It comes in a 121-ball BGA (10 x 10 mm) or a space saving 131-ball Wafer-Level Chip Scale Package (WLCSP) with dimensions of 4.7 x 5.1 mm.