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Low jitter clocks target communications and data centers

Low jitter clocks target communications and data centers

New Products |
By Jean-Pierre Joosting



Renesas Electronics Corporation has expanded its timing portfolio with a new sub-100-fs point-of-use clock for data center, server, and network infrastructure markets. The latest FemtoClock2 family includes ultra-low jitter clock generators and jitter attenuators in a small 4×4 mm2 package, enabling cost-effective and simple clock tree implementation for next-generation, high-speed interconnect designs.

Featuring best-in-class jitter as low as 64 fs RMS, FemtoClock2 enables customers to easily meet next-generation PAM4 requirements on new switch or router designs. With a 4×4 mm2 form factor, the FemtoClock2 family is less than one third the size of similar products on the market. This allows designers to place the clock source at the point of use – very close to the device receiving the clock signal – for streamlined PCB layout design, reduced cross talk, and cleaner signals. Flexibility makes the family useful in many applications. FemtoClock2 can be configured as a DCO, clock generator, or jitter attenuator, offering valuable design flexibility and reuse.

“PAM4 technology is enabling a major leap in data transmission rates in both communications and data center segments resulting in stringent requirement on the clock in such systems,” said Bobby Matinpour, Vice President of Timing Products, Data Center Business Division at Renesas. “Expanding our popular FemtoClock lineup, Renesas offers a new high-performance family that delivers superior jitter performance with low power in a small form factor, enabling placement of the clock anywhere on the board at the point of use. This greatly simplifies the design by eliminating the additive jitter associated with the extensive clock routing on the board.”


Key features include:

  • As low as 64fs (typ) RMS jitter;
  • Low power consumption of 600 mW;
  • 4×4 mm2 in 24- and 28-pin QFN packages;
  • Single and dual input options with four differential outputs;
  • Power supply noise rejection better than -80 dB;
  • Output-to-output isolation of -80 dBc;
  • Compliant with ITU-T G.8262 and G.8262.1 for enhanced synchronous Ethernet/OTN;
  • Integrated crystal option for more space savings.

Customers can combine the latest FemtoClock2 family with Renesas’ small, single-output, high-performance oscillators, or the broader ClockMatrix™ portfolio of timing products to address challenging timing needs for their high-performance server and network infrastructure designs. FemtoClock2 also works seamlessly with systems using the recently introduced PTP Clock Manager software for IEEE 1588 support, and can be combined with Renesas’ complementary power and microcontroller offerings to create comprehensive systems for a variety of applications, such as the IEEE 1588 Winning Combination. FemtoClock2 also serves as the downstream clock capable of delivering 100 fs at the pin without disrupting the synchronization.

The RC32504A and RC22504A FemtoClock and an evaluation board are available now.

www.renesas.com/femtoclock2

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