Low power AI chip for robotics
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Researchers in the US have developed a low power multicore AI chip for robotics applications.
The MAVERIC chip built at the University of California, Berkley, uses a 16nm process with four RISC-V processor cores and 13 AI accelerator cores. These can provide AI vision analysis at 72 frame/s for ML and robotics applications. 3D reconstruction robotics application combines depth estimation (DE) and simultaneous localization and mapping (SLAM) for perception tasks
The chip, shown at the VLSI Technology & Circuits Symposium in Tokyo in June, operates at up to 1 GHz and achieves 8 TOPS/W peak energy efficiency. It supports loop closure and delivers 10 mJ/frame and 72 FPS at the end-to-end DE and SLAM.
The chip has eight 8bit integer accelerators and 5 32bit floating point accelerators, with 2504 Kbits of memory. The supply voltage from 0.52V to 1.0V reduces the power consumption to a low at 20mW at 100MHz, rising to 1.8W at 1GHz.
The architecture of MAVERIC, showing the eight INT8 ML accelerators, the five FP32 linear algebra accelerators, the four RISC-V CPUs and 3-layer NoC for binding the sub-blocks.
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