Low-power, “always listening” voice detection/recognition on FPGA

Low-power, “always listening” voice detection/recognition on FPGA

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By eeNews Europe

The design approach enables system power savings by ensuring processing sub-systems remain off until a verified human voice is recognised. This improves the user experience by activating exclusively to owner’s voice and providing near-zero latency response to specific, high use commands at much lower power consumption.

The IP is implemented in the iCE40 family of mobile FPGAs; Lattice says designers can add to the features of mobile devices with new voice activation capabilities and maximise battery life by minimising false wake-up triggers to the processor.

Lattice Semiconductor;

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