Low-power, cost-optimized FPGA family addresses multiple markets
According to Bruce Weyer, vice president and business unit manager at Microsemi, this non-volatile FPGA provides tangible power and cost benefits over SRAM FPGAs that feature 10 Gpbs transceivers and fills a void in the market.
Microsemi’s PolarFire FPGAs enable the company to increase its FPGA addressable market to over $2.5 billion covering both the low end and mid-range FPGA market segments. In addition, the innovative features of the new product family support Microsemi’s continued growth within the communications infrastructure market.
Today’s cellular infrastructure and wireline access networks are facing a rapid transformation, having to deliver terabytes of high value content to consumers while reducing operational and capital expenditure spend, as well as reducing their thermal and carbon footprint. The PolarFire FPGAs provide cost-effective bandwidth processing capabilities for the increasing number of converged 10 Gpbs ports with the lowest power footprint. They also address the market’s growing concerns over cyber security threats as well as reliability concerns that face deep submicron SRAM-based FPGAs as they relate to single event upsets (SEUs) in their configuration memory.
The new devices are designed for a number of applications within the communications market, including wireline access, network edge, metro (1-40G); wireless heterogeneous networks, wireless backhaul, smart optical modules and video broadcasting. The devices are also well-suited to applications within the defense and aerospace market, such as encryption and root of trust, secure wireless communications, radar and electronic warfare (EW), aircraft networking, actuation and control. Ideal applications for the FPGAs within the industrial market include process control and automation, machine vision processing and analytics, programmable logic controllers, industrial networking, and video and image processing.
“PolarFire FPGAs enable customers to forego purchasing FPGAs with higher power and cost to obtain the 12.7G transceiver performance required for many mid bandwidth applications, while extending the benefits of our ultralow power, high reliability and high security,” advertizes Shakeel Peera, senior director, SoC product marketing at Microsemi. “Combining PolarFire FPGAs with Microsemi’s portfolio of application-specific standard products (ASSPs) enables end-to-end solutions in timing, voice processing, storage, Optical Transport Network (OTN) switching and transport, and power management across multiple market segments.”
Microsemi has been actively engaged with select customers in its Early Access Program, and adoption of the product family has already begun.
In collaboration with Silicon Creations, Microsemi has developed a 12.7 Gbps transceiver fully optimized to be area efficient and low power, resulting in total power of less than 90 milliwatts (mWs) at 10 Gbps. With best-in-class low device static power of 25 mW at 100K logic elements (LEs), zero inrush current and unique Flash*Freeze mode for best-in-class standby power of 130 mWs at 25 degrees C, PolarFire devices are up to 50 percent lower power than competing FPGAs for the same application.
Microsemi also provides customers with a power estimator to analyze power consumption of their designs. After implementation, the SmartPower Analyzer can be used to access full design power.
The FPGA family also is said to provide the industry’s best reliability with its inherent immunity to configuration SEUs. Additional features to aid with reliability include built-in single error correction and double error detection (SECDED) as well as memory interleaving on large static random access memory (LSRAMs), and system controller suspend mode for safety critical designs.
In addition, PolarFire FPGAs offer Cryptography Research Incorporated (CRI) patented differential power analysis (DPA) bitstream protection, integrated physically unclonable function (PUF), 56 KB of secure embedded non-volatile memory (eNVM), built-in tamper detectors and countermeasures, true random number generators, integrated Athena TeraFire EXP5200B Crypto Co-processors (Suite B capable) and a CRI DPA countermeasures pass-through license.
The devices’ cost-optimized architecture uses 28 nanometer (nm) Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) non-volatile process technology on standard complementary metal oxide semiconductor (CMOS). PolarFire FPGAs also incorporate transceiver performance optimized for 12.7 Gbps enabling smaller size and lowest power, hardened I/O gearing logic for double date rate (DDR) memory and low-voltage differential signaling (LVDS), high performance security IP and the industry’s only low cost mid-range device with clock and data recovery (CDR) capable 1.6 Gbps I/Os.
Microsemi’s Libero SoC Design Suite offers high productivity with its comprehensive, easy to learn, easy to adopt development tools for designing with the company’s cost-optimized PolarFire FPGAs. The suite includes a complete design flow with Synopsys Synplify Pro synthesis and Mentor Graphics ModelSim Pro mixed-language simulation with best-in-class constraints management, and Microsemi’s differentiated FPGA debugging suite, SmartDebug. Popular IP solutions for 1G Ethernet, 10G Ethernet, JESD204B, DDR memory interfaces, AXI4 interconnect IPs and others are available for use with PolarFire devices.
The PolarFire PGA product family is shipping to early access customers now and samples for general availability will be offered in the second quarter of 2017. Orders for samples can be placed immediately.
For more information, visit www.microsemi.com/polarfire
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