Low-power floating point processor targets M2M

Low-power floating point processor targets M2M

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By eeNews Europe

The FPS26 has a Harvard architecture, sixteen 32-bit registers and a 5-stage pipeline. It offers an IEEE 754 single precision hardware floating point unit, a pipelined parallel multiplier and a hardware divider. It supports the AXI4-Lite bus as well as Cortus APS peripherals.
The small size of FPS26 makes it suitable for cost sensitive applications. Using the Linpack benchmark FPS26 delivers 9.7 times better floating point performance than the APS25 integer core.
Up to eight co-processors can be added to an FPS26 core. The Cortus coprocessor interface allows licensees to add custom coprocessors, for example to accelerate computations in cryptography or signal processing, without knowing details of the internals of the core. Co-processor instructions can be inserted into C-code appearing as function calls.

All cores interface to Cortus’ peripherals including Ethernet 10/100 MAC, USB 2.0 Device and USB 2.0 OTG via the efficient APS bus. They also share the simple vectored interrupt structure which ensures rapid, real time interrupt response, with low software overhead.

The APS tool chain and IDE (for C and C++) is available to licensees free of charge, and can be customised and branded for final customer use. Ports of various RTOSs are available such as FreeRTOS, Micrium μC/OSII, Micrium μC/OSIII & TargetOS.

Visit Cortus S.A.S. at

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