Low-power FPGA bundles accelerate embedded vision designs

July 16, 2019

By eeNews Europe

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The initiative includes new high-speed imaging interfaces, an IP bundle and an expanded partner ecosystem. It provides a range of FPGA offerings that includes IP, hardware and tools for low-power, small form factor machine vision designs.

Microchip has added the following as part of the Smart Embedded Vision initiative:

• Serial Digital Interface (SDI) IP – Used to transport uncompressed video data streams over coaxial cabling, this interface comes in multiple speeds: HD-SDI (1.485 Gbps, 720p, 1080i), 3G-SDI (2.970 Gbps, 1080p60), 6G-SDI (5.94 Gbps, 2Kp30) and 12G-SDI (11.88 Gbps, 2Kp60).

• 1.5 Gbps per lane MIPI-CSI-2 IP – MIPI-CSI-2 is a sensor interface that links image sensors to FPGAs. The PolarFire family supports receive speeds up to 1.5 Gbps per lane and transmit speeds up to 1 Gbps per lane.

• 2.3 Gbps per lane SLVS-EC Rx – SLVS-EC Rx is an image sensor interface IP supporting high-resolution cameras. Customers can implement a two-lane or eight-lane SLVS-EC Rx FPGA core.

• Multi-rate Gigabit MAC – The PolarFire family can support 1, 2.5, 5 and 10 Gbps speeds over an Ethernet PHY, enabling the initiative to meet the need for Universal Serial 10 GE Media Independent Interface (USXGMII) MAC IP with auto-negotiation.

• 6.25 Gbps CoaXPress v1.1 Host and Device IP – Aligned with the industry’s roadmap for the standard, Microchip will support CoaXPress v2.0, which doubles the bandwidth to 12.5 Gbps.

• HDMI 2.0b – The HDMI IP core today supports resolutions up to 4K at 60 fps transmit and 1080p at 60 fps receive.

• PolarFire FPGA Imaging IP bundle – Features the MIPI-CSI-2 and includes image processing IPs for edge detection, alpha blending and image enhancement for colour, brightness and contrast adjustments.

• Expanded Partner Ecosystem – New partner Kaya Instruments will provide PolarFire FPGA IP Cores for CoaXPress v2.0 and 10 GigE vision, to the partner ecosystem. The ecosystem also includes Alma Technology, Bitec and AI partner ASIC Design Services, which provides a Core Deep Learning (CDL) framework that enables a power-efficient CNN-based imaging and video platform for embedded and edge computing applications.

PolarFire FPGAs use up to 50 percent lower total power over competing SRAM-based mid-range FPGAs. PolarFire family members have from 100K to 500K Logic Elements and have five to 10 times lower static power.

A new MIPI-CSI2-based machine learning camera reference design has been launched for smart embedded system implementations. Based on the PolarFire FPGA imaging and video kit that uses inference algorithms from Microchip partner ASIC Design Services, the reference design is free for evaluation.

All Smart Embedded Vision solutions in the initiative are supported by the Libero SoC Design Suite.

All machine vision IP available through the Libero SoC Design Suite can be implemented on the PolarFire FPGA Video and Imaging Kit.

The following IP cores are available today:

• HD-SDI (1.485 Gbps, 720p, 1080i)

• 3G-SDI (2.970Gbps, 1080p60)

• MIPI-CSI-2

• Two-lane SLVS-EC Rx FPGA core

• 6.25 Gbps CoaXPress v1.1

• HDMI 2.0 4k at 60 fps transmit and 1080p at 60 fps receive

The following IP cores will be available by the end of 2019:

• 6G-SDI (5.94 Gbps, 2Kp30)

• 12G-SDI (11.88 Gbps, 2Kp60)