Low-power SSD controller optimises NAND storage
The collective of features and process start to optimize long before errors occur or the system is even assembled. A qualification process characterizes each supported flash type over its lifetime and different operating temperatures. This knowledge is then implemented in the basic flash support of the firmware and delivered with the controller. The next phase, during operation, ensures the controller continuously adjusts the voltage levels of the read-out circuit over the flash’s lifetime. The controller also takes further steps to prevent errors such as dynamic data-refresh, near-miss ECC and read disturb management. In the subsequent phase, in which errors occur in spite of the precautions mentioned before, there is a strong error correction in two separate modules, one being based on a BCH-code as well as the new generalized concatenated code (GCC) with support for soft-decoding.
Hyperstone – www.hyperstone.com
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