Low-profile mezzanine connector system supports data rates of up to 40 Gbps per differential pair
The mated stack heights of 4.00 to 10.00mm along with a 0.80mm pitch provide design engineers with the ultimate in flexibly to address space constraints without sacrificing performance. The SpeedStack Connector System comes in multiple circuit sizes of 22, 44, 60, 82, 104 and 120 with a range of 6 – 32 differential pairs for even greater flexibility. The 100 Ohm design provides superior impedance control with an 85 Ohm version to be released in June 2013 that will support PCIe* Generation (Gen) 3.0 and Intel QuickPath Interconnect (QPI) requirements for next-generation I/O and memory signalling. The insert-moulded wafer design includes a protective shrouded housing, providing support to the terminal location and improved electrical balance. A common ground pin helps improve electrical performance and minimise crosstalk.
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