The LCD interface includes its own DMA controller to allow it to operate independently of the CPU and other system functions. A built-in FIFO acts as a buffer for display data, providing flexibility for system timing, while hardware cursor support can further reduce the amount of CPU time needed to operate the display.
In addition, the NXP LPC178x microcontrollers support Super-Twisted Nematic (STN) and Thin-Film Transistor (TFT) graphic display panels up to 1024 x 768 pixels, from monochrome up to 24-bit true-colour. The 120MHz LPC178x MCUs have up to 512kbyte of Flash, 96kbyte of SRAM and 4kbyte of EEPROM memory on-chip.
The 32-bit external memory controller supports SDRAM, NOR and SRAM devices with four chip selects. Additional peripherals available on the LPC178x and LPC177x series include a Host/Device USB controller, a 10/100T Ethernet controller, Anti-Tampering Event Recorder, eight-channel General-Purpose DMA (GPDMA) controller, 12-bit ADCs, 10-bit DAC, motor control PWM and Quadrature Encoder Interface, five UARTs, three I2C, I2S, three SSP/SPI, Smart Card interface, four timers, windowed watchdog timer, an ultra-low power RTC, and up to 165 general purpose I/O pins.
For more information, visit https://ics.nxp.com/support/microcontrollers/lcd/