Machine learning boost for complex chip and package reliability analysis

Machine learning boost for complex chip and package reliability analysis
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The cloud-enabled PrimeSim Reliability Analysis tool from Synopsys is part of an ISO26262 safety critical design flow for reliability analysis of complex chips and system-in-package designs
By Nick Flaherty

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Synopsys has launched a simulation and analysis tool that uses machine learning to boost the reliability of complex chip and package designs across the product lifecycle.

The need for safety and reliability has become paramount for critical IC applications across areas such as automotive, aerospace and medical, which require low defect rates that are often measured in defective parts per billion (DPPB), higher functional safety including compliance with industry standards such as ISO 26262 and higher long-term reliability under stringent operating conditions. The latest system-on-chip and system-in-package (SIP) designs make this analysis even more complex.

Several leading semiconductor companies have adopted PrimeSim Reliability Analysis, including STMicroelectronics, Dialog Semiconductor (now part of Renesas Electronics), AMD and TDK.

The PrimeSim Reliability Analysis tool is integrated with the Synopsys PrimeSim Continuum simulation environment to provide reliability assessment for early life, normal life and end-of-life failures, design engineers can minimize costly late-stage engineering change orders (ECOs) and defect escapes.

It is part of the ISO 26262 TCL1-certified Synopsys Custom Design Platform and can be reliably used to verify functional safety for ASIL D applications. Using the PrimeWave design environment in PrimeSim Continuum provides a seamless reliability verification experience, enabling unified simulation management, weakness analysis, results visualization and what-if exploration. All these technologies are cloud-ready with optimization for leading public cloud platforms and containerized environments.

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“A more holistic approach is needed to address the challenges with today’s hyper-converged and mission-critical IC designs, including comprehensive electrical and manufacturing reliability and thermal assessments,” said Raja Tabet, senior vice president of the Custom Design and Manufacturing Group at Synopsys. “PrimeSim Reliability Analysis solution represents a pioneering approach to safety and reliability analysis, reimagining design for high reliability. Part of the PrimeSim Continuum family of solutions, PrimeSim Reliability Analysis solution accelerates full-lifecycle reliability signoff, enabling faster time-to-results and higher designer productivity.”

PrimeSim Reliability Analysis uses conventional and machine learning- (ML-) driven technologies that deliver significant speedup for high-sigma leaf cell characterization, static circuit checks, power/signal network integrity resistance, EM and IR signoff analysis, MOS aging analysis and safety and test coverage analysis using analog fault simulation.

Next: Certification and customers


The tool is certified by TSMC and qualified by Samsung Foundry, Intel and GlobalFoundries (GF). Providing cohesive reliability verification across early, normal and end-of-life scenarios helps address the need to produce safe and trusted designs alongside the Synopsys Silicon Lifecycle Management Platform that provides comprehensive post-silicon reliability monitoring, analysis and mitigation.

“The Analog Circuit Check technology of PrimeSim Reliability Analysis solution accelerated the reliability signoff on our analog IPs by enabling detection of critical design issues early in the design cycle,” said Vivek Bhan, senior vice president, Custom Mixed Signal Business Group at Renesas. “We value the agile support offered by Synopsys, particularly in the development of custom circuit checks, and look forward to future collaborations.”

“Automotive ICs govern the operation of a plethora of mission-critical functions such as advanced driver assistance systems (ADAS), braking and steering and, therefore, require systematic FMEDA [failure modes, effects and diagnostic analysis] analysis to ensure high levels of functional safety,” said Dr. Mario Anton, vice president of R&D. “The analog fault simulation technology of PrimeSim Reliability Analysis solution offers high-performance, customizable fault models and an open fault database, enabling our designers to easily calculate IP-level FMEDA metrics and verify ISO 26262 compliance on our automotive ICs.”

“High reliability and long operating lifetimes are critical requirements for ICs, especially in automotive and space applications,” said Shamsi Azmi, senior director at ST. “The electromigration analysis technology in PrimeSim Reliability Analysis solution is easy to use, delivers improved performance and has been extensively used to analyze our analog IPs. We worked closely with Synopsys to develop a sophisticated variation-aware aging flow using the MOS aging technology in PrimeSim Reliability Analysis solution and PrimeSim XA’s Monte Carlo analysis technology to model the impact of device variation in aging analysis, improving the long-term reliability of our memory and analog/mixed-signal IP.”

“High sigma Monte Carlo analysis is critical to ensuring the robustness of standard cell libraries for today’s demanding HPC, data center and mobile applications,” said Mydung Pham, corporate VP. “The advanced variability analysis technology in PrimeSim Reliability Analysis enables 4-7 sigma characterization at a fraction of the runtime cost of brute-force Monte Carlo analysis, with tight correlation to PrimeSim HSPICE, and is deployed for library characterization within AMD. We look forward to collaborating with Synopsys to broaden usage of this technology for other applications.”

The Synopsys PrimeSim Reliability Analysis solution is available now.

synopsys.com/primesimreliabilityanalysis 

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