Massively parallel chip tackles data centre storage
The KTC40 includes a PCIe board based on Kalray’s MPPA2 massively parallel processor with a full software stack for NVMe-oF (embedded non-volatile memories over fabrics) and Ethernet JBOF (Just a Bunch Of Flash). These protocols are used to improve the management and density of solid state drives in data centre designs.
JBOF eliminates the need for dual x86 controller and DDR memory, reducing the cost of JBOFs by 65% and increasing SSD density by 60%. This gives an overall reduction in power consumption of 65%.
The MPPA2 Bostan I/O processor runs 288 C/C++ programmable 64bit Very Long Instruction Word (VLIW) cores, optimized for networking and storage applications, and includes high speed interfaces like 80GE and PCIe x16 lane Gen3 directly connected to the large matrix of 288 cores and 128 crypto co-processors. It has been used for encryption accelerators and autonomous driving applications.
“We are excited to offer this unique solution to our data centre customers,” said Eric Baissus, CEO at Kalray. “KTC40 will give our customers a new range of possibilities for optimizing their JBOF. This means increased SSD density, as well as big savings in both the cost of the JBOF itself and in terms of significant reductions in power consumption within the JBOF. We are confident that this will be a leading solution in the new era of Ethernet-compatible JBOFs.”
Related stories:
- MPPA PROCESSORS FOR AUTONOMOUS DRIVING
- KALRAY: THE STORAGE REVOLUTION
- KALRAY GAINS CHINESE BACKING IN $26 MILLION FUNDING ROUND
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