MCU goes SOC – Changes in Microcontrollers and Testers Equipment
Until quite recently, MCUs were used purely for digital devices. While their internal functionality became more and more powerful, they typically only sent and received digital signals. The environment for testing such MCUs was set up to meet these basic needs. All that was required was to test the digital connections, and any analogue signals that were encountered were few and far between and not very complex.
Today, MCUs are fitted with a variety of interfaces and cater to the full array of electronics. To meet mobile applications requirements, such as battery consumption, their own electrical power needs are continually decreasing. The accuracy of existing test solutions can no longer cover their capabilities. To communicate directly with analogue realities of the world today, more and more high-resolution analogue-to-digital converters are being integrated in MCUs.
As we live in the age of the ever expanding internet with its devices and a new smart world, MCUs have to communicate more often using wireless channels. Remote control functionality is taken for granted where car key rings are concerned, but what if you want to network the washing machine to your other household appliances so that it only starts running when the photovoltaic system is providing sufficient electrical power? Or how about using your smartphone to remotely operate the shutters and dim the lights when you’re on holiday?
Integration with sensors is a growing trend. An MCU needs not only to passively receive electrical signals, but also has to immediately detect what is actually happening via its sensors. One simple application is the wireless pressure sensor in car tyres, which continuously reports the pressure to the vehicle.
In the MCU market, it is not just the technology that is making advances. The integration of different functions is paving the way for new players in the market. Former specialists in wireless communication currently integrate MCUs because manufacturers are also incorporating their RF transmitters and receivers. That is also why costing pressures are increasing. The demand is for testing a greater number of increasingly complex MCUs in less time than before, using fewer test devices, all the while satisfying low cost demands. That’s no easy task even if more memory has been integrated in the MCU, which also requires testing.
Below is a summary of challenges being faced by MCUs today and from which new testing requirements arise:
- Lower power consumption, smaller tolerances for leakage current, diminished performance in the applied signals
- Faster data rates, faster interfaces
- Increasing use of analogue interfaces, AD converters
- Wireless RF connections such as Near Field Communication (NFC), Zigbee, Bluetooth
- Integration of sensors
- Cost pressure.
A simple digital test was all that used to be required to test MCUs. These were installed in large numbers and tested MCUs during the production process, while still in the wafer, and then packaged in final test. At one time, this was completely adequate for testing the relatively generic requirements, such as measuring low data rates and a robust, high power, high voltage designs, . But when it comes down to achieving a high throughput involving parallel testing a large numbers of MCUs, the trend now is to replace these with other devices. Occasionally, memory module testers are even deployed as these systems suffice for pure digital testing. Memory module testers are not capable of testing analog interfaces, let alone RF interfaces, because their throughput capacity is not always an economical option.
Essentially, there are two ways of increasing the throughput. The very first approach is to shorten the test time required for a single chip. The second key variable is to test multiple MCUs in parallel. Just a few years ago, parallel testing of 32 chips was not common practice, which was reflected in the pace of tester development. There was also a lack of handling equipment that was capable of moving more than 8 or 16 chips at a time. However, things have moved on considerably since then. Today, it is now possible to run parallel tests on 32 or more chips, even during final tests. It is becoming increasingly more commonplace to run parallel tests of 64 to 128 chips at the wafer test stage. Additionally, the costs for direct interfacing systems (probe cards), though achievable, is financially unfeasible to maintain.
An important indicator for parallel testing is multisite efficiency (MSE). At an MSE of 100%, testing 64 chips, for instance, would take just as long as testing one chip. That’s why the test time for one single chip is so crucial. If this is too long, then parallel tests on multiple chips can’t be shortened. These figures explain further:
· If the test time for one chip is 10 seconds, at an MSE of 98% a test cell that tests 32 chips simultaneously will achieve a throughput of 7,111 units per hour. An MSE of 98% is already quite high for most chips that have long been installed. For many MCUs, however, this is far too low if they are to achieve their potential.
· By just changing the MSE to 99.9%, which is quite possible depending on the chip, you can raise the throughput to 11,174 units per hour, an increase of 57%. If you then increase the number of parallel tested chips to 64, you can achieve a throughput of 21,675 units. That’s 200% more throughput. In other words, you need two fewer test cells.
The first immediate challenge with parallel test is to make sure that you have enough resources for the tester to perform at its full ability. Through a classical approach this is achieved by installing more plug-in modules for the tester, with the risk of space running out. This means that you have to compromise not only parallel test, but also serial test on analogue interfaces. Serial testing raises the test time dramatically, with MSE and throughput dropping accordingly.
MCUs contain more and more System on a Chip (SOC) components which results in them being tested on SOC testers. Technically speaking, this is the right approach. From an economic point of view, however, the investment costs have to be taken into consideration as these can very quickly spiral out of control. SOC testers also don’t have unlimited space to accommodate the various plug-in modules needed for different test requirements.
Fig. 1: With increasing parallelism, the throughput (XPUT) in units per hour (UPH) changes dramatically with minor adjustment to the MSE.
The Advantest V93000 is a tester that was initially deployed to test complex SOCs, but has since evolved into an MCU tester. With its universal pin function, one single channel offers all the functions necessary to test an MCU: voltage supply, digital test and analog test.
Fig 2: Evolved from SOC test: The V93000 handles all tasks involved in MCU testing.
Each V93000 Smart Scale generation channel on the PS1600 card covers voltage levels ranging from 2.0V to 6.5V. This means that not only can it supply voltage, but it can measure it as well. One important requirement for MCU testing is DC measurement accuracy down to the 10nA range.
The ADC on the PS1600 board can be utilized as a digitizer and allows for static tests of 12 to 14-bit DACs. This is an 18-bit digitizer with a maximum sample rate of ~ 50ksps and is perfectly adequate for linearity measurements and some audio measurements.
1.6 Gbps is the maximum digital data throughput of the PS1600 card which is more than sufficient for most MCUs. When this signal is sent through a filter it produces an AWG with a sample rate of 100 Msps. This feature covers both the static and dynamic testing of 12 to 14-bit ADCs. The signal distribution matrix on the PS1600 card allows this signal to be routed to other channels on the board and provides a fan-out in the tester. The PPMU integrated in every channel on the card can be used to run static and dynamic tests on 10 to 12-bit ADCs. This allows for a sample rate of 200 ksps.
Fig 3: The Swiss Army Knife of MCU testing: With a throughput of 1.6 Gpbs and the capability to measure and power the DUT, the PS1600 handles most requirements.
The RF transmitter in a tyre pressure sensor, for example, can be tested by utilising the high bandwidth of the receiver on the PS1600 card and setting the oversampling to 1.6 Gbps.
All of these functions in a single channel on the PS1600 card are pattern-controlled, which means that they can be switched on and off without using relays on the DUT board. Configurable MCUs with I/Os are capable of taking over different tasks and can be tested much more elegantly, quickly and cheaply.
The V93000 test platform from Advantest offers a range of scalable test modules that can be plugged in the tester. Should the MCU requirement be somewhat higher, it can be easily retrofitted.
About the author:
Georg Michanickl is Market Development Manager MCU Market at Advantest. Previously he held positions as Market Development Manager for Korea, Business and Market Development Manager for high speed memory solutions, Market Segment Lead for computation market and Business Development Manager for US computation key accounts and European accounts at Agilent/Verigy. Prior to joining Agilent, Georg was a Product Manager for computer peripherals at Wacom and Project Coordinator for Ove Arup Consulting Engineers. He has a master of science from the University of Birmingham, England and an engineering degree from the University of Applied Sciences of Aalen, Germany.
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