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Mezzanine card eases APIX developments with Intel FPGAs

Mezzanine card eases APIX developments with Intel FPGAs

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By Christoph Hammerschmidt



The card can be connected to any Intel FPGA development board via an HSMC connector which provides the conditions for system development with FPGAs and system-on-chips (SoCs) from Intel that the microprocessor manufacturer has acquired through the takeover of Altera. A design example will be available in the Intel Design Store, which allows APIX2 video and data streams to be received and collected from cameras and transmitted via an APIX2 connection.

APIX2 is Inova’s Serializer / Deserializer (SerDes) technology for video and data communication within vehicles. It allows fast differential data transmission over a quad-twisted pair (QSTP) cable with a bandwidth of up to 3 Gbps. APIX2 as the second generation of the proven APIX standard is primarily targeting display and camera applications in the car.

The two on-board receiver modules (Innova INAP375RAQ) accept video streams with resolutions of up to 1,600 x 600 pixels and refresh rates of up to 100 Hz, for example. Its video interface is configurable to handle up to two independent video streams, supporting a total of maximum four video streams.

 

The Inova INAP375TAQ transmitter module can send 18 or 24-bit video streams with a resolution of up to 1600 x 600 pixels, 24-bit color depth and refresh rates up to 100 Hz via the digital RGB or OpenLDI video interface to a display.

The 10/100 Mbit / s Ethernet port allows the card to send and receive corresponding data streams via the APIX2 connection of the sender and the receiver using the Media Independent Interface (MII). It is also suitable for sending IP video traffic via the APIX2 connections.

In camera applications, the cameras can be supplied with electrical po

For more information visit www.inova-semiconductors.de

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