The new dsPIC33CH512MP508 dual-core DSC enables support for applications with larger program memory requirements. The dsPIC33CK64MP105 single-core DSC adds a cost-optimised version for applications that require smaller memory and footprint. Developers can easily scale across product lines using the new devices, which are pin-to-pin compatible within the dsPIC33CH and dsPIC33CK families.
The dsPIC33CH512MP508 (MP5) family expands the recently introduced dsPIC33CH with Flash memory growing from 128 KB to 512 KB and triples the program RAM from 24 KB to 72 KB. This enables support for larger applications with multiple software stacks or larger program memory, such as automotive and wireless charging applications. More memory is needed to accommodate AUTOSAR software, MCAL drivers and CAN FD peripherals in automotive applications. Implementing wireless charging in automotive applications requires additional software stacks for the Qi protocol and Near-Field Communication (NFC), driving the need for even more program memory. Using Live Update capability for real-time firmware updates is essential for high-availability systems but also doubles the overall memory requirement.
In the dual-core devices, one core can function as a master while the other is designed as a slave. The slave core is useful for executing dedicated, time-critical control code while the master core is busy running the user interface, system monitoring and communications functions. For example, having two cores facilitates partitioning of the software stacks for parallel execution of the Qi protocol and other functions such as NFC to optimise performance in automotive wireless charging applications.
The dsPIC33CK64MP105 (MP1) family extends the recently introduced dsPIC33CK family with a cost-optimised version for smaller memory and footprint applications, offering up to 64 KB Flash memory and 28- to 48- pin packages. Package sizes are available as small as 4 mm x 4 mm. This compact device offers the ideal combination of features for automotive sensors, motor control, high-density DC-DC applications or stand-alone Qi transmitters. Both single- and dual-core dsPIC33C devices enable fast deterministic performance for time-critical control applications, providing expanded context selected registers to reduce interrupt latency and bringing faster instruction execution of math-intensive algorithms.
All devices in the dsPIC33C family include a fully featured set of functional safety hardware to ease ASIL-B and ASIL-C certifications in safety-critical applications. Functional safety features include multiple redundant clock sources, Fail Safe Clock Monitor (FSCM), IO ports read-back, Flash Error Correction Code (ECC), RAM Built-In Self-Test (BIST), write protection, analogue peripheral redundancies and more. A robust set of CAN-FD peripherals, together with the new support for 150°C operation, make these devices ideally suited for use in extreme operating conditions such as under-the-hood automotive applications.
The dsPIC33C family is supported by Microchip’s MPLAB development ecosystem including Microchip’s free MPLAB X Integrated Development Environment (IDE), MPLAB Code Configurator, MPLAB XC16 C Compiler tool chain and MPLAB in-circuit debugger/programr tools. Microchip’s motorBench Development Suite version 2.0, now supporting high-voltage motors up to 600V, is also available to help customers tune motors using the Field Oriented Control (FOC) algorithm.
The dsPIC33CH512MP5 devices are available now in 48-/64-/80-pin TQFP, 64-pin QFN and 48-pin uQFN packages. The dsPIC33CK64MP1 devices are available now in 28-pin SSOP, 28-/36-/48-pin uQFN and 48-pin TQFP packages.