Microchip slashes PolarFire FPGA pricing by 30%
Microchip has cut the price of its PolarFire field programmable logic FPGA and system on chip (SoC) devices by 30%.
“At the end of last year as the industry crisis continued to unfold there were ‘price adjustments’ by other suppliers, particularly at the lower end,” said Shakeel Peera, vice president of FPGA marketing and strategy at Microchip.
“The FPGA market last year was in an inventory bloat and that continues so the market is in recovery mode. So we sat down and looked at where our business was with PolarFire and took a five year view. We are in a position to make a contrarian announcement as our view is for a market share gain.”
The company has cut the pricing by disabling certain blocks on the die, particularly the transceivers, to reduce the test costs for the PolarFire Core and PolarFire SoC Core.
“We looked at the opportunity for a PolarFire derivative that tackles operational costs rather than wafer costs for intelligent edge applications. The main feature we are removing is the transceiver and the PCIe 2.0 controller, a crypto processor with user memory that was used in military as well as streamlining the way we yield these parts and inventory them,” he said. “On average at the distributor you will be paying 30% less.”
“The die size is the same with the same mask set but what we save is the test cost and we do a couple of things in front and back end testing to reduce the costs. We made this decision in January and we are ready to ship in May, that tells you it’s not a new die. But it also means everything from the design tools to the operating system are all reusable.”
The devices are aimed a local applications such as AI, dimming a video display in automotive using the video processing on the FPGA gates, or eye tracking in medical devices.
- An AI flow for PolarFire RISC-V FPGAs in edge designs
- FPGA board sends real time sensor data to edge AI
“Everything will be connected at the system level but you have to look at where the processing will be done. We are talking about local processing, reducing the power consumption in a high volume application.”
The SoC version adds a five core block with four RISC-V applications processor and a management core. The application cores can use Asymmetric Multi Processing (AMP) with each core capable of running its own Linux or real time operating system.
“Each core is able to perform A-class or M-class processing for AMP to give ultimate flexibility in how to use the core. For industrial networking with Time Sensitive Networking (TSN) for example the TSN may be handled outside in a switch so we just have to connect to the switch”.
The cost reduction is about taking market share from other vendors such as AMD, Altera and Lattice, he says. “When we started to diversify from defence and aerospace we were at 5% market share and last year we were at 10%. We want to get to 15% with this,” he said.
The PolarFire Core devices are supported by Microchip’s Libero SoC Design Suite, SmartHLS compiler, VectorBlox Accelerator SDK and Microchip’s Mi-V platforms for rapid RISC-V application development and are compatible with currently available PolarFire FPGA and SoC development boards.
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
