Microsemi adds security features to create “most secure” FPGAs

Microsemi adds security features to create “most secure” FPGAs

Feature articles |
By eeNews Europe

The new data security features are now part of Microsemi’s mainstream SmartFusion2 SoC FPGAs and IGLOO2 FPGA. In the emerging era of connected devices, Microsemi says, machines need not only to be secure, but they need to be secure at the device, design and system levels. For example, even a machine or system that meets Advance Encryption Standard (AES) could be vulnerable to side channel attacks. Microsemi’s differential power analysis (DPA) countermeasure solution increases overall system security by protecting the keys that are stored in the system, protecting it against such attacks.

Microsemi’s newest generation of SmartFusion2 SoC FPGA and IGLOO2 FPGA programmable devices are positioned as the industry’s most secure, with three key elements covering secure hardware, design security and data security. Built through a secure supply chain management system, Microsemi data security devices feature:

– Licensed, patent-protected DPA resistance from Cryptographic Research Inc.

– Active tamper detectors including an active mesh

– Secure flash key storage

– Unique key generation through Intrinsic ID’s Physically Unclonable Function (PUF) Quiddikey-Flex

– Full NIST-certified crypto accelerators

Microsemi has support information on how to use these advanced data security features in SmartFusion2 SoC FPGAs and IGLOO2 FPGAs on the SmartFusion2 Security Kit at

The company asserts that with this family of devices, it has the only FPGAs with a PUF; with DPA countermeasure techniques based on Cryptographic Research Inc. licensed technology; with full data security processing capability with hardware accelerators for AES, SHA, HMAC, elliptic curve cryptography (ECC) and nondeterministic random bit generator (NRBG); and with NIST certified state-of-the-art security in a programmable device, covering DRBG, AES256, SHA256, HMAC, ECC-CDH; plus active tamper detectors, and zeroisation. Zeroisation is an in-built ‘panic button’ that unrecoverably deletes on-chip data in the event of unauthorised access.

SmartFusion2 integrates a flash-based FPGA fabric, a 166 MHz ARM Cortex-M3 processor, advanced security processing accelerators, DSP blocks, SRAM, eNVM and communication interfaces all on a single chip. See;

IGLOO2 FPGAs provide a LUT-based fabric, 5G transceiver, high speed GPIO, block RAM, high-performance memory subsystem, and DSP blocks;

If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :    eeNews on Google News


Linked Articles