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Microsemi and Escrypt partner on cryptographic FPGA solutions

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By eeNews Europe

The new advanced encryption standard (AES) and elliptic-curve cryptography (ECC) cores incorporate countermeasures to defeat side-channel attacks, making them among the most secure FPGA implementations available, say the companies.

DPA and related techniques relying upon electromagnetic radiation can be used by an attacker to extract the secrets being processed inside a device such as cryptographic keys being used in a microcontroller, by observing unintended leakage of information via unintended side channels.

DPA attacks are widely applicable to most cryptographic algorithms using unprotected implementations, running in virtually any type or brand of embedded processor, FPGA or hard logic. Optimized for Microsemi FPGAs, Escrypt’s AES-128 implementation provides a high data throughput with a low hardware footprint, making it suitable for a wide range of embedded applications.

The hardened AES IP-core combines several logical countermeasures against DPA attacks including algorithmic masking and time randomization. In addition to the AES core, Escrypt is announcing a side-channel resistant ECC IP-core. With this ECC IP-core, the generation and verification of digital signatures not only becomes much faster but also more secure against malicious attacks.

Visit Escrypt at www.escrypt.com

Visit Microsemi at www.microsemi.com


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