Microsemi unveils IEEE 1588 PTP IP and reference design on SmartFusion cSoC devices
Microsemi’s Core1588 provides hardware support for the implementation of IEEE 1588 PTP capable systems, and interacts with firmware provided in the reference design. The IEEE 1588 PTP allows synchronization of devices connected to an Ethernet network with a high level of accuracy. One of the devices on the network serves as the master clock, while the other devices behave as slave clocks synchronizing to the master clock’s value. The master clock is dynamically selected among the PTP capable devices on the network. The IEEE 1588 best master clock (BMC) algorithm is used to determine which device should be used as the master clock device.
SmartFusion cSoCs are the only devices that integrate an FPGA, a complete microcontroller built around a hard ARM Cortex-M3 processor and programmable analog, enabling full customization, IP protection and ease-of-use. Based on Microsemi’s proprietary flash process, SmartFusion devices are ideal for hardware and embedded designers who need a highly integrated SoC that provides more flexibility than traditional fixed-function microcontrollers, and significantly reduces the cost of soft processor cores on traditional FPGAs.
Microsemi offers a full featured reference design for Core1588, targeted to its SmartFusion evaluation and development kits with Core1588 to qualified customers at no charge.
Visit Microsemi at www.microsemi.com/soc.
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
