MIPI C-PHY update supports image sensor applications
The MIPI Alliance has updated its high-performance, low-power and low EMI C-PHY interface specification for connecting cameras and displays.
MIPI C-PHY Version 3.0 introduces support for an 18-Wirestate mode encoding option, increasing the maximum performance of a C-PHY lane by approximately 30 to 35 percent. This enhancement delivers up to 75 Gbps over a short channel, meeting the rapidly growing demands of ultra-high-resolution, high-fidelity image sensors.
A more efficient encoding option, 32b9s, transports 32 bits over nine symbols while maintaining industry-leading low EMI and low power properties. For camera applications, the new mode allows for lower symbol rates or lane counts for existing use cases, or higher throughput with current lane counts to support new use cases involving very high-end image sensors. These use cases include:
- Next-generation prosumer video content creation on smartphones, with high dynamic range (HDR), smart region-of-interest detection and advanced motion vector generation.
- Machine vision quality control systems that can detect the smallest defects in fast-moving production lines.
- Advanced driver assistance systems (ADAS) that analyse the trajectory and behaviour of fast-moving objects in the most challenging lighting conditions.
MIPI C-PHY supports the MIPI Camera Serial Interface 2 (MIPI CSI-2) and MIPI Display Serial Interface 2 (MIPI DSI-2) ecosystems in low-power, high-speed applications for the typical interconnect lengths found in mobile, PC compute and IoT applications.
The MIPI C-PHY specification provides high throughput, a minimised number of interconnect signals, and superior power efficiency for connecting cameras and displays to an application processor. This is due to efficient three-phase coding unique to C-PHY, which reduces the number of system interconnects and minimizes electromagnetic emissions to sensitive RF receiver circuitry that is often co-located with C-PHY interfaces.
The specification enables lanes to be relocated within a link because C-PHY functions as an embedded clock link. It also allows for low-latency transitions between high-speed and low-power modes. MIPI C-PHY includes an alternate low power (ALP) feature, which enables a link operation using only C-PHY’s high-speed signalling levels. An optional fast lane turnaround capability utilises ALP and supports asymmetrical data rates, allowing implementers to optimise transfer rates according to system needs. Further, MIPI C-PHY can coexist on the same device pins as MIPI D-PHY so that designers can develop dual-mode devices.
Support for C-PHY v3.0 was included in the most recent MIPI CSI-2 v4.1 embedded camera and imaging interface specification, published in April 2024. To aid implementation, C-PHY v3.0 is backwards-compatible with previous C-PHY versions.
“C-PHY is MIPI’s ternary-based PHY for smartphones, IoT, drones, wearables, PCs, and automotive cameras and displays,” said Hezi Saar, chair of MIPI Alliance. “It supports low-cost, low-resolution image sensors with fewer wires and high-performance image sensors in excess of 100 megapixels. The updated specification enables forward-looking applications like cinematographic-grade video on smartphones, machine vision quality-control systems and ADAS applications in automotive.”
In addition, significant development work continues on the shorter-reach physical layer, MIPI D-PHY. Version 3.5, released in 2023, includes an embedded clock option for display applications, while the forthcoming v3.6 specification will expand embedded clock support for camera applications, targeting PC/client computing platforms. The next full version, D-PHY v4.0, will further enhance embedded clock support for use in mobile and beyond-mobile machine vision applications, while also increasing the data rate beyond its current 9 Gbps per lane.
Further, the MIPI Alliance conducted a comprehensive channel signal analysis last year to document the longer channel lengths of both C- and D-PHY. The resulting member application note, “Application Note for MIPI C-PHY and MIPI D-PHY IT/Compute,” demonstrated that both C-PHY and D-PHY can be utilised in larger end products, such as laptops and all-in-ones, with minimal or no changes to the specifications originally deployed in mobile phones or tablets, or even for longer lengths by operating at a reduced bandwidth.
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