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MIPI CSI2 interface bridge IC integrates de-interlacing and video scaling functions

MIPI CSI2 interface bridge IC integrates de-interlacing and video scaling functions

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By eeNews Europe



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The new chipset enables HDMI video streams to be recognized and read directly by application processors and provides a quick path to other processor application areas without having to perform time-consuming processor redesigns. 

By providing on-chip support for video preprocessing of video de-interlacing, video scaling and video format conversion, the T358749XBG, replaces software processing and significantly reduces memory bandwidth on the host processors deployed in consumer electronics. The new IC is suitable for use in a wide range of devices, such as smart set-top boxes, smart TVs, smart monitors, small form-factor PCs and smart media players. 

Toshiba’s T358749XBG supports HDMI 1.4 for video format resolutions of up to 1080P at 60fps (RGB, YcbCr444: 24-bpp, YcbCr422 24-bpp), as well as HDCP 1.3 and 3D. Maximum HDMI clock speed is 165MHz and the MIPI CSI2 output video interface offers four data lanes at a maximum 1Gbps/lane link speed.

The 7x7mm interface bridge IC also supports multiple audio interfaces, including I2S, TDM, S/PDIF, and MIPI Serial Low-power Inter-chip Media Bus (SLIMbus), making it suitable for a wide range of audio video applications. Available in an FGA80 package the IC supports HDMI source voltages of 3.3V, MIPI/Core/PLL voltages of 1.2V and has an I/O of 1.8V-3.3V. Samples are currently available and mass production is scheduled to start in December this year.

Visit Toshiba Electronics Europe at www.toshiba-components.com

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