MIPS64 architecture powers Cavium’s latest multi-core processors
OCTEON III processors are designed for the enterprise, data center, access and service provider markets, which require increasing support for converged data, voice and video. To address this need, the OCTEON III family introduced today by Cavium integrates 1 to 48 MIPS64 cores at up to 2.5 GHz, providing up to 120 GHz of 64-bit compute power per chip.
Cavium’s previous generation OCTEON II processor family was recently named “Best Embedded Processor” of 2011 by The Linley Group. The OCTEON III family builds upon this success, incorporating more cores and features to address markets including cloud computing, high-end core and edge routers, metro Ethernet, enterprise switches, 3G/4G/LTE base-stations, enterprise security gateways and appliances, storage networking and mobile core infrastructure equipment.
With the OCTEON III family, multiple chips can be combined into a single logical high-performance processor using Cavium’s innovative chip interconnect architecture. All OCTEON III processors also incorporate new dedicated hardware engines to speed search, protocol parsing and traffic management, as well as enhanced cryptography, compression and deep packet inspection engines.
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