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Mobile FPGAs from 640 to 16K logic cells on 40nm low-power standard CMOS process

Mobile FPGAs from 640 to 16K logic cells on 40nm low-power standard CMOS process

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By eeNews Europe



Fabricated on TSMC 40-nm low-power standard CMOS process, both families provide twice the logic capacity of previous 65-nm devices. Delivered in a 2.5×2.5mm micro plastic BGA package, the Los Angeles LP-Series CMD is well suited as an application processor companion chip solution for smartphone applications providing support for sensor management, high-speed custom connectivity and convergence of HD video and imaging. The Los Angeles HX-Series CMD targets tablets and provides support for sensor management, high-speed custom connectivity and tablet resolution, HD video and imaging. The LP and HX devices range from 640 to 16K logic cells. The chips now support WUXGA (1920×1200) with dual LVDS, HD720p 60Hz (1280×720) and HD1080p 30Hz (1920×1080). MIPI-DPI/DBI is also supported.

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