Moore’s Law: a mixed-signal perspective
Steve Taranovich: The 50th anniversary of Moore’s Law coincides with Analog Devices’ 50th anniversary. How has the industry’s singular focus on Moore’s law impacted analog innovation?
Dave Robertson: Gordon Moore’s observation was about the number of transistors on a chip doubling at a certain pace, and focused on integration, scale, and density. By the time “Moore’s Law” celebrated its 25th birthday in 1990, it had also come to represent the driving pace of cost reduction, increased processing speed, increased performance, and shrinking size that has enabled the electronics revolution to migrate from industrial applications to business applications to consumer applications. Today, this continuous exponential improvement is taken for granted as an economic entitlement.
For example, consider the way you think about the newest electronic device splashed across the headlines. If it is too expensive today, you can count on it following a lower price curve in six months, 12 months, and 24 months. In the digital world, scaling drives everything, or at least, so it has seemed. While scaling is important in the analog world, it is not always the dominant consideration. In digital signal processing, for example, we are dealing with the abstractions of binary 1s and 0s. We can scale capacitance, resistance, and supply voltages downward because there are no absolutes. This is true at least until noise or quantum effects start to impact our ability to distinguish a 1 from a 0. In analog electronics, on the other hand, we have to deal with absolutes of voltage, charge, current, capacitance and resistance. Information from real sensors has to be recovered, real loads have to be driven – be that a motor, a relay, or an antenna. Non-scalable impedances may constrain how much we can “shrink” a circuit. Limitations in electromagnetic propagation may constrain what frequencies a radio can work in. The FM radio band, for example, has not moved in frequency with Moore’s Law. Shrinking dimensions mean shrinking supply voltages, and for analog circuits, with their associated signal-to-noise ratio (SNR) limits, it can be shown that lowering the supply voltage may actually increase the power consumption of analog amplification stages.
Still, scaling, density, and integration have had an enormous impact on analog innovation. Even in high-performance mixed-signal circuits, most of the circuitry is not limited by SNR, so scaled technologies on lower supply voltages have been able to deliver performance and power efficiency improvements – though admittedly not at the pace of digital advancements [ref. 1]. Furthermore, the integration afforded by lithography scaling and yield improvements has been exploited in the analog and mixed-signal domains. We now have full audio systems-on-a-chip, single-chip cell phones, ICs that integrate the sensor, signal conditioning, data conversion, and digital communication functions all in a power-efficient solution. To realize these great analog advances, “Moore’s Law” type scaling was necessary, but not sufficient by itself since numerous other innovations also were required.
Next: R&D targets
ST: How has the semiconductor industry used Moore’s law to guide long-term planning and set targets for research and development?
DR: Much like the drive to build a transcontinental railroad or put a man on the moon, Moore’s Law set a goal. In this case, it was a constantly moving goal that an entire industry saw as more than a goal and almost as the electronics industry’s version of Manifest Destiny.
In fact, the semiconductor industry created ITRS (International Technical Roadmap for Semiconductors), an industry body that meets regularly to chart the roadmap and highlight the technical challenges that need to be resolved to take the technology forward. Given the highly competitive nature of the industry, this shows a remarkable level of cooperation and has allowed a level of coordination between researchers, equipment providers, and IC manufacturers that would have been difficult to realize through individual corporate efforts. ITRS also explicitly recognized that the analog and mixed-signal world has special requirements that are not effectively addressed by Moore’s Law.
Dave Robertson, product line director with Analog Devices.
In 2010, ITRS produced a white paper that called out other dimensions of the semiconductor process technology roadmap: the "More than Moore" set of innovations.** As a result, ITRS has been tracking and projecting changes in high-voltage process technology, sensor technology and other real-world, mixed-signal issues that can be very important to advancing mixed-signal circuits. This provided further evidence that while integration, improved performance, and reduced cost continue to be important themes, they are not always realized through lithographic scaling.
Next: Is this the end?
ST: While there is still definitely life left in Moore’s Law, are we leaving the golden age after a 50-year run? How does Moore’s Law continue to apply to data converter innovation, for example?
DR: From the analog side of the world, we often think about several different epochs. Through the 1970s and even into the 1980s, analog ICs were generally developed on different process technologies than their digital counterparts. While the analog world benefitted indirectly from advances in digital technologies, such as advances in wafer handling and processing equipment, we generally ran with different manufacturing "recipes." In many cases, the digital world made use of MOS and CMOS technologies, while the workhorse of the analog world was the bipolar transistor.
In the 1980s, the use of analog CMOS and switched-capacitor techniques became much more prevalent. By 1990, analog CMOS was becoming universal, and, in combination with the wide availability of advance processing through foundries, this really opened up the golden age of analog scaling. Fabless semiconductor companies could start up with a new idea and grow rapidly. Universities had access to advanced processes, so research was no longer limited to academically abstract problems. As a result, many PhD theses led directly to the founding of new companies. A big portion of the mixed-signal community rode down Moore’s Law curve along with the digital companies. Every generation provided better power efficiency, higher speed, and greater density.
However, as processes scaled beyond 0.5-micron the technology advances came with a "mixed-signal cost." Each new lithography step meant a reduction in the supply voltage. For the digital world, the supply voltage was an abstract: it meant a “1.” For the analog world, a drop in the supply voltage meant a shrinking full-scale signal and a reduction in SNR. In order to reduce noise, you had to burn more power – a LOT more power – and your old circuit techniques no longer fit into the existing voltage headroom.
Fortunately, the golden age also established a vast network of engineers and university researchers ready to attack these problems. New circuit technologies were developed and new architectures evolved to take advantage of fine line geometry CMOS strengths and suppress the impairments. These included the prevalence of oversampling techniques, and more recently the use of digitally assisted analog compensation schemes.
ST: As chips get denser and denser, do you expect the industry to run into fundamental physics issues?
DR: There are some hard physical limits out there. Scaling eventually runs out of steam as we approach the atomic spacing distances. Before we run into the hard wall of physical limits, however, we are going to face the very steep hill of economic realities. Continued scaling has called for sophisticated engineering to realize the patterning and scale the transistor. This is expensive at the mask level. NRE costs of $2 million or more are common at 28nm or below. It also makes the processes tricky to design with and this can be particularly true for analog and mixed-signal circuits.
Next: Markets, meet physics
These problems are being addressed for large volume applications, such as cell phone chipsets, where huge markets can amortize the significant investments required. But this poses a challenge for smaller volume applications, such as medical instruments, and industry players in these markets will be looking for ways to produce platforms that can serve various applications. In the digital world, FPGAs represent an effective way of bringing advanced lithography to smaller volume applications.
ST: How will the next decade bring more integration across the different vertical markets?
DR: For large volume markets such as cell phone handsets, SoC integration will include mixed-signal functionality. For smaller volume applications, system designers will be able to take advantage of standard products that make use of advanced technologies to produce great performance and a higher level of flexibility or reconfigurability. This will include a level of programmability in synthesizers and on-chip filters, and performance that can be scaled up and down on demand in a trade-off for power efficiency. In the middle, there are other interesting trade-offs that can be made, including system in package approaches where two to five die can be combined in a single package to realize the density that approaches that of true SoC but at a fraction of the development cost.
Ref. 1: B. Murmann, "ADC Performance Survey 1997-2015," [Online]. Available here
Robertson has authored numerous technical papers and award-winning presentations for venues such as the ISSCC and the VLSI Symposium. He has a BA and BE from Dartmouth College with dual majors in economics and electrical engineering. He can be reached at email@example.com.
This article first appeared on EE Times’ Planet Analog website.
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