MRAM maker builds storage accelerator card; establishes Xilinx compatibility
Everspin is introducing initial capacities of 1 Gigabyte and 2 Gigabyte of Spin Torque MRAM today, based on its 256Mb DDR3 ST-MRAM. Capacities from 4 Gigabyte up to 16 Gigabytes will be available later in this year utilizing Everspin’s 1 Gigabit DDR4 ST-MRAM. The nvNITRO ES1GB and ES2GB operate at 1,500,000 IOPS with 6 µsec end-to-end latency. They are offered in a half-height, half-length (HHHL) PCIe card with two access modes: NVMe SSD and memory mapped IO (MMIO). Enterprise storage system designers now have the benefit of memory speed in a storage form factor and protocol. The use of Everspin’s ST-MRAM means that the data is persistent and power fail safe without the need for supercapacitors or battery backup, saving critical space in storage racks. The high cycle endurance of ST-MRAM also enables unlimited uniform drive writes per day, eliminating the need for complex wear levelling algorithms used in NAND Flash based drives. There is no degradation in read/write performance over time with Everspin’s ST-MRAM.
This extreme performance, combined with ultra-low and consistent latency, means that demanding applications will be able to count on faster, more predictable transactions. The read/write speed and low latency have value in many storage applications such as database and file system acceleration, on-line transaction processing log caches, and metadata caching/buffering. The need for faster speed across storage networks and within data centres can be met with the first all-MRAM storage cards that provide both block access storage and byte addressable memory functions on the same platform. The PCIe Gen 3, NVMe interface makes it simple to add this capability to existing storage networks and servers because there is no need for special drivers or operating system changes.
Expands MRAM ecosystem with Xilinx FPGAs
Everspin has also established DDR3 and DDR4 compatibility between its Spin Torque MRAM and Xilinx’s UltraScale FPGA DRAM memory controller. Everspin can provide its customers with a software script that modifies the existing Xilinx Memory Interface Generator (MIG) DDR3 DRAM controller to make it compatible with its 256 Megabit DDR3 ST-MRAM memory that is available now and will do the same for the 1 Gigabit DDR4 ST-MRAM by June of this year.
“The compatibility of Xilinx’s MIG with Everspin’s ST-MRAM will provide systems developers the capability to implement a high speed, persistent memory system in their custom solutions,” said Manish Muthal, Vice President of Data Centre at Xilinx.
Everspin; www.everspin.com
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
