That’s according to a slide shown by Tom Coughlin and Jim Handy at the Storage Networking Industry Association (SNIA) persistent memory and computational storage (PMCS) summit, which was held virtually this year.
The development is labelled as ‘disruptive.’ It may come about as a way of achieving an area shrink over six-transistor SRAM arrays but because MRAM is a non-volatile memory that retains data when power is removed could stimulate innovation in processor architectures.
Coughlin and Handy provided a joint presentation (see video below) on trends in nonvolatile memory technologies, in which they discussed the status of phase-change memory, resistive RAM, ferroelectric RAM and MRAM.
TSMC embedded MRAM roadmap. Source: Coughlin and Handy.
They showed an SoC roadmap slide from TSMC which labelled the embedded MRAM option at 22nm as eMRAM-F. It also shows the offer of embedded RRAM at 22nm and embedded PCM albeit with the insertion point question marked. It is notable that the roadmap also shows another variant, eMRAM-S, for the replacement of SRAM working memory being offered at the 14nm/12nm node.
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