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MTP memory block targets 0.13μm power management chips

MTP memory block targets 0.13μm power management chips

New Products |
By Nick Flaherty



Jointly developed with Taiwan-based Yield Microelectronics Corporation (YMC), the non-volatile MTP-IP memory core measures 0.061mm2 for a 1Kbit block and lowers the read/write operation range to 1.65V. The dual-cell and ECC designs have greatly enhanced reliability. The IP provides high-density 16K*32 MTP + 1K EEPROM IP with ECC design and 40ns high-speed access time.and the two companies plan to expand the IP into automotive and mobile designs,.

Demand for embedded and programmable Non-Volatile Memory (NVM) is growing in power management ICs (PMICs). MagnaChip’s IP requires zero to two mask layers less than embedded Flash memory, and has a thousand-time programming/erasing capability. As a result, MTP is gaining interest as a highly competitive and cost-effective solution over One-Time Programmable (OTP) solutions. MagnaChip and YMC already have collaborated on MTP solutions in 0.35μm to 0.18μm tech nodes, and mass-produced a variety of products including MCUs, touch and power management ICs (PMICs).

“The continued collaboration between MagnaChip and YMC has produced greater innovation and variety in the types of MTP solutions being offered to customers,” said Daniel Huang, YMC’s President. “YMC sees its continued strategic partnership with MagnaChip as a long-term benefit to both YMC’s and MagnaChip’s customers.”

“We are delighted to continue this valuable partnership with Taiwanese IP solution leader YMC,” said YJ Kim, Chief Executive Officer of MagnaChip. “We believe our collaboration will lead to even more cost-efficient, high-functioning NVM solutions to satisfy the increasingly sophisticated needs of global foundry customers for a growing number of diverse applications.”

YMC in Taiwan’s Chu-Pei city is a specialist embedded logic multiple-time non-volatile memory (NVM) IP provider that licenses design houses and semiconductor foundries.

www.magnachip.com

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