Multi-cores tackle human interface
"Smartphone users now expect their appliances to have smart touch-enabled human-machine interfaces, but microcontrollers that are good at running high-level OS’s like Android have a hard time delivering realtime deterministic control, too," said John Weil, global business manager for industrial MCU solutions at Freescale. "Our new Vybird family solves that problem with a heterogeneous ARM architecture — using a Cortex-A5 core for both the human interface and a Cortex-M5 for realtime control."
The Vybrid processor is an industry first in its ability to simultaneously run both a high-level OS (Linux/Android) and a realtime OS (RTOS/MQX) on its dual heterogeneous ARM Cortex A5 and M4 cores, respectively. By separating the two functions, but allowing development from a single platform of tools, Freescale claims that applications can be streamlined in cost, time-to-market and energy consumptions.
The Cortex-A5 is ARM’s answer to criticisms leveled at its higher-performance A9, offering 14.4 Dhrystone-MIPS per milliwatt compared to 8-DMIPS per milliwatt for the A9, a 80 percent savings in energy consumption for only a 56 percent reduction in performance (1.6 DMIPS per MHz for the A5 compared to 2.5 DMIP per MHz for the A9). Plus, since the M4 core is handling all the realtime interrupts and other mission-critical functions, the A5 is offloaded making it a better fit for its targeted consumer, automotive, industrial and medical applications.
Freescale already has several design wins, including two mega-corporations, for its Vybrid processor, which is sampling next quarter and which is slated to begin volume production in the third quarter of 2012. Current applications to be delivered from original equipment manufacturers (OEMs) late in 2012 or early 2013 include touchscreen-enabled point-of-sale terminals, medical monitors/dispensers, and white goods. Typical division-of-labor between the A5 and M4 cores include running a touch-enabled Android user interface as the human-machine interface on the A5, and the security-and-safety algorithms for guaranteed drug delivery for medical applications as well as the servo-control and swipe-and-read algorithms for industrial and point-of-sale applications, respectively, on the M4 cores.
Hardware support for a semaphore-based message-passing system handles communications between the two cores. All the usual peripherals for both applications processors and realtime control processors are on-chip too, including flex-timers, watchdogs, clocks, low/high frequency oscillators, interrupt routers, analog-to-digital and digital-to-analog converters, phase-locked loop, debug-and-trace, direct-memory access, power management, cryptography module, tamper detection, UART, CAN, SPI, Ethernet, USB, boot-ROM, SRAM, and both flash and DDR memory controllers.
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