Multi-function boundary-scan testers cover all bases
The first in the series – JT 5705/USB – is supplied as desktop instrument, primarily aimed at hardware validation applications in design, small-scale production test and in some cases field service and repair. The JT 5705/USB features two 15 MHz TAPs and 64 I/O’s available through 0.1-inch IDC connectors. 56 of the I/O channels are always digital, 16 of which also feature a frequency function. The remaining 8 channels can be used as either digital I/O or analog I/O. The unit also contains a user programmable FPGA, facilitating application-specific digital I/O options. Via the built-in ‘Multi-Sync’ feature several JT 5705/USBs can be combined into a single JTAG controller providing multiple TAPs and hundreds of I/Os.
The second model in JTAG’s new range is the larger JT 5705/RMI, a 1U high 19” rack-mountable instrument for use in systems or as a bench-top tester. This unit features four 15 MHz TAPs and 4 groups of 64 mixed-signal I/O channels providing a total of 256 I/O’s available through 0.1” IDC connectors. As before, within each 64 channels group, 56 channels are permanently digital with 16 available as frequency inputs. The remaining 8 channels of each group can be individually programmed as digital I/O or analog I/O channel. Furthermore the JT 5705/RMI features a total of 4 user programmable FPGA’s for creating application specific digital I/O options.
The I/O capabilities as provided by the JT 5705/USB are also available in a separate I/O module, the JT 5112 Mixed-signal I/O scan module, or MIOS. The MIOS module can be used in combination with existing JTAG Technologies boundary-scan controllers such as JT 3705, JT 3710 and JT 37×7 adding analog I/O capabilities to those controllers.
As the boundary-scan market expands beyond traditional high-density digital targets seen in Mil/Aero and Telecoms and automotive applications. In this context, JTAG expects to see particular high demand for in-car electronic control units – many ECUs require an analog/sensor stimulus which registers back to a microprocessor where the values can be checked using boundary-scan or JTAG emulative test methods. To meet such requirements, the test equipment must evolve accordingly. As well as supporting multiple JTAG (IEEE 1149.x) compatible TAPs with programmable thresholds the units have extensive mixed-signal I/O capability with a programmable measure and stimulus range of ±16V or 0-32V for the analog channels.
Use of the FPGA kernel allows user to develop their own digital I/O options such as CAN bus, counter/timer or high-speed memory access. IP code from sharing sites such as Open Cores can be implemented in the FPGA fabric and accessed via JTAG Technologies’ own CoreCommander FPGA translator module.
For further information visit www.jtag.com
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