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NeoLogic tapes out 16nm Quasi-CMOS chip, looks to 3nm

NeoLogic tapes out 16nm Quasi-CMOS chip, looks to 3nm

Business news |
By Nick Flaherty



Israeli processor technology startup NeoLogic expects to tape out an ARM processor at 16nm using its Quasi-CMOS technology.

The Quasi-CMOS technology and the processor will be available for evaluation to key selected customers, and the company is now working on 5nm and 3nm standard cells.

Quasi-CMOS significantly increases the maximum number of inputs of standard cells and by changing their topology to reduce the number of transistors. This benefits the logic synthesis as well as the physical design.

The company has completed the development of new standard cells for the 16nm technology node, on top of the existing CMOS standard cells library. NeoLogic’s standard cells are single-stage high fan-in (8 to 16 inputs), among others, leading to up to 50% reduction in power consumption compared to the most advanced equivalent CMOS cells while saving up to 40% of the area.

The technology was conceived to address the increasing workloads in data centres and the need to reduce the high costs associated with developing processors using advanced technology nodes. Designing processors with Quasi-CMOS should improve the power per watt per millimeter square for AI, machine learning, data analysis, video streaming, and more in datacentres, and the tapeout of the processor will help to characterise the improvement.

“Utilizing Quasi-CMOS for processor development delivers a technological leap in performance. Our design technology enables us to design a 16nm processor that delivers performance equivalent to more advanced – sub 16nm – technology nodes, while saving development NRE and manufacturing costs,” said Dr. Avi Messica, Co-founder and CEO of NeoLogic.

The company, founded by 2021, raised $8m seed funding in July. Messica previously served as a device group manager at Tower Semiconductors and has hands-on experience in the design and fabrication of CMOS devices. He also served as VP of Engineering at Shellcase and founded and served as the CEO of three semiconductor companies in the fields of image sensors, MEMS-based optical switches, and photonic chips.

Co-founder Ziv Leshem has 25 years of experience in processor design with National Semiconductors, DSPG, and Synopsys, and managed complex processor design projects. He was one of the founders of LogixL, a company that developed a hardware-based HDL simulator and also served as a manager at NewSight Imaging, a developer of LiDAR and iTOF sensors.

www.neologic.com

 

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