New architecture creates alias-free high bandwidth ADC

New architecture creates alias-free high bandwidth ADC

Technology News |
By Nick Flaherty

Analog Devices (ADI) has launched an alias-free analogue-to-digital converter (ADC) that significantly simplifies front-end design and speeds up time to market for precision applications from DC to 350kHz. 

The AD7134 uses a new ADC architecture that fundamentally changes the design process by removing the need for anti-alias filter, while the resistive input significantly simplifies ADC drive. This is the first high precision DC to 400 kHz bandwidth ADC to use continuous time sigma-delta (CTSD) modulation scheme. This removes the traditionally required switched capacitor circuitry sampling preceding a sigma delta (Σ-Δ) modulator, which leads to a relaxation of the ADC input driving requirement.

The ADC also integrates an asynchronous sample rate converter (ASRC) providing data at variable data rates derived from the fixed sampling speed of CTSD. The output data rate can be independent of modulator sampling frequency and can enable successful use of CTSD ADCs for different granular throughputs. The flexibility to change the output data rate at a granular level also enables users to use coherent sampling.

The quad-channel, 24-bit precision ADC with output data rate scalable from 10SPS to 1.5MSPS.  Inherent anti-aliasing up to 102 dB eliminates the need for an external anti-alias filter, requiring 60 fewer passive components and five fewer active components.

A differential instrumentation amplifier such as the LTC6373 can be used to directly drive the ADC, saving 70 percent of the board area, relative to a typical alternative implementation.  Asynchronous sample-rate converter, simplifies multi-device synchronization, enables user to achieve coherent sampling system with ease, and simplifies isolation requirements.

The AD7134 is available in production now in a 8mm x 8mm 56-Lead LFCSP.

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