New levels of noise and linearity performance achieved in analogue ASICs
The circuit is designed to interface with a SDD sensor (Silicon Drift Detector). It embeds complex and low noise analogic blocs such as a pre-amplifier, a shaper and a peak & hold. It offers the best noise and temperature linearity performances on the market: the noise was measured at 21.6 electrons at 25°C, which is twice as good as most examples of this type of circuits on this market. [note; noise quantified in “electrons” – usually, electrons-rms – is a statistical method of reporting charge-based sensor noise and expresses the spread of successive measurements from a nominal value.]
These performance figures were achieved under low power consumption conditions of under 320 µA at 1.8 V. The silicon measurements perfectly fit the initial specification of the circuit and simulations. They were realised on prototypes using a 180 nm technology, at temperatures between -50°C and +25°C.
“IRAP had the technical responsibility of the R&D contract signed between Dolphin Integration and the CNES for the study of this ASIC: functionality and performance specification and development follow-up. The low-noise and low-power consumption constraints were huge and the development schedule was very short (5 months). Thanks to a close collaboration with the development team of Dolphin and its efficiency, the tape-out date was met, and the noise and power consumption specifications achieved. This is a good collaboration example between a research laboratory, the CNES and the industry, which results in a high performance product. The next step of this collaboration will target an ASIC close to the instrument needs of LOFT” declared Alain Cros, ASIC project leader for the LOFT mission.
Dolphin Integration says that this success, demonstrate the abilities of its ASIC designers in terms of their knowledge of the state-of-the-art and strengthens their leadership in mixed signal ASIC.
Dolphin Integration, https://mysoc.dolphin.fr
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