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NSITEXE teams for RISC-V edge AI platform

Business news |
By Nick Flaherty

The chip design arm of Denso has teamed up to develop a reliable Edge AI platform for RISC-V based AI inference processing IP (AI IP).

NSITEXE’s design combines a MIMD vector processor based on the RISC-V Vector Extension Version 1.0 with a 2D Convolution Engine using a proprietary layer fusion architecture to execute a wide range of edge AI inference workloads with safely and power-efficiently.

The platform, developed with three other Japanese firms, will use this with deployment tools for converting and performance optimizing pre-trained neural network (NN) models for AI IP, and middleware for executing inference with high performance and safety. Using this platform, users can easily execute NN models developed on neural network frameworks such as TensorFlow and Pytorch on AI IP.

The platform also includes a real time operating system from OTSL, compiler from Kyoto Microcomputer (KMC) and blockchain and AI frameworks from Axell.

The NN model deployment tool quantizes, layer fuses, and lightens pre-trained NN models to generate optimized graph structure source code. The Axell middleware includes performance-optimized NN model computing libraries and NN model execution control libraries, as well as a fast bare metal runtime thread scheduler (RTS) and the OTSL multitasking flexible RTOS-based runtime environment. This will help the spread of AI in edge devices by providing an integrated development environment for building and debugging that is easy for embedded engineers to use, says the group.

NSITEXE provides an environment for seamless deployment of models created on neural network frameworks and MATLAB/Simulink to AI IP. To address safety-critical systems that require real-time performance, a lightweight and fast runtime thread scheduler (RTS), Software Test Library for Functional Safety (STL for FuSa) that supports hardware fault diagnosis and network execution monitoring functions, and a performance-optimized RISC-V vector extension arithmetic library will be developed.

OTSL will provide an RTOS that runs on RISC-V vector processors for the Reliable Edge AI platforms. This RTOS enables efficiently computing using RISC-V vector extension.

KMC will provide LLVM/Clang compilers to maximize the performance of RISC-V vector processor on the Reliable Edge AI platform. This tool includes C/C++ Math libraries for RISC-V vector extension to enable efficiently computing on a vector processor. KMC’s JTAG debugger “PARTNER-Jet2” will support RISC-V vector processor on AI IP.

Axell provides an AI execution environment for embedded systems based on advanced knowledge of AI implementation and optimization gained through the development of the AI framework with its software development kit (SDK).

“At NSITEXE, development efforts have been focused on three pillars – versatility, efficiency, and functional safety – with massive future trends in mind. By utilizing RISC-V based Reliable Edge AI platform to achieve high power efficiency and safety, we will provide automotive customers around the world with an essential development platform for a mobility society that creates a sustainable world, including clean energy,” said Hideki Sugimoto, CTO of NSITEXE.

“ OTSL has been providing software platforms such as RTOS and Hypervisor by leveraging its expertise in embedded system development. We are very pleased to contribute to the ecosystem surrounding RISC-V by providing RTOS for this Reliable Edge AI platform,” said Shoji Hatano, President of OTSL

www.nsitexe.com

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