Nvidia opens up NVLink for chiplets to take on PCI Express
Nvidia has announced a new version of its NVLink communications protocols that can be used for chiplets and chip-to-chip (C2C) connections.
NVLink-C2C will allow custom die and smaller chiplets to coherently interconnect to the company’s graphics processors, system-on-chip devices and network interface cards.
With advanced packaging, NVIDIA NVLink-C2C interconnect would deliver up to 25x more energy efficiency and be 90x more area-efficient than the latest generation 5 of the PCI Express (PCIe) protocol, allowing interconnect bandwidth of 900 gigabytes per second or higher.
However Nvidia is also supporting the developing Universal Chiplet Interconnect Express (UCIe) standard proposed by Intel last month and based on PCIe, where the 6th generation standard has been agreed. This allows custom silicon integration with Nvidia chips to use either the UCIe standard or NVLink-C2C.
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“Chiplets and heterogeneous computing are necessary to counter the slowing of Moore’s law,” said Ian Buck, vice president of Hyperscale Computing at Nvidia. “We’ve used our world-class expertise in high-speed interconnects to build uniform, open technology that will help our GPUs, DPUs, NICs, CPUs and SoCs create a new class of integrated products built via chiplets.”
Nvidia has already used NVLink-C2C to connect the processor silicon in the latest Grace SoC family, and the Grace Hopper announced last year, but the company has now opened up the protocol for semi-custom silicon-level integration with Nvidia technology. The protocol is built on SERDES and LINK design technology, and it is extensible from PCB-level integrations and multichip modules to silicon interposer and wafer-level connections,
NVLink-C2C supports the ARM AMBA Coherent Hub Interface (AMBA CHI) protocol and the two companies are enhancing AMBA CHI to support fully coherent and secure accelerators with other interconnected processors.
“As the future of CPU design is increasingly accelerated and multichip, it is critical to support chiplet-based SoCs across the ecosystem,” said Chris Bergey, senior vice president and general manager of the Infrastructure Line of Business at ARM. “ARM is supporting a broad set of connectivity standards and designing our AMBA CHI protocol to support these future technologies, including collaborating with Nvidia on NVLink-C2C to address use cases like coherent connectivity between CPUs, GPUs and DPUs.”
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