NVLink takes on PCI Express
PCI Express has been the de facto interconnect for CPUs for a decade, but Nvidia has worked with IBM to use NVLink to provide higher bandwidth links between POWER processors and Nvidia’s Pascal graphics processor in 2016. This will allow systems to scale to exascale (1000 PFLOPS) performance for high performance computing, data analytics and machine learning, says the company.
Today’s GPUs are connected to x86-based CPUs through the PCI Express (PCIe) interface, which limits the GPU’s ability to access the CPU memory system and is four- to five-times slower than typical CPU memory systems. PCIe is an even greater bottleneck between the GPU and IBM POWER CPUs, which have more bandwidth than x86 CPUs. The NVLink interface will match the bandwidth of typical CPU memory systems to allow GPUs to access CPU memory at its full bandwidth, operating at 80 and 200 GB/s, 5 to 12 times that of the 8Gbytes/s of the current x16 lane PCIe 3.0 and higher than the proposed PCIe version 4.0 proposed for the end of 2015.
The basic building block for NVLInk is an 8-lane differential, dual simplex bidirectional link and the Pascal GPUs will support a number of these links, providing configuration flexibility. The links can be ganged together to form a single GPU-to-CPU connection or used individually to create a network of GPU-to-CPU and GPU-to-CPU connections. This higher speed will also allow lower energy transfers for the same data rate, reducing the power consumption and heat dissipation in the data center.
NVIDIA has designed a module to house GPUs based on the Pascal architecture with NVLink that is 30% the size of the standard PCIe boards used for GPUs today. Connectors at the bottom of the Pascal module enable it to be plugged into the motherboard, improving system design and signal integrity.
Nividia sees this as unlocking the potential of unified memory so that programmers can treat the CPU and GPU memories as one block of memory and not worry whether the data sits in the CPU’s or GPU’s memory.
Although Nvidia says future GPUs will continue to support PCIe (as above), NVLink will be used to link CPUs and networks of GPUs. As an industry standard, PCI Express has also been off many challengers over the years .
PCIe 4.0 proposes a 16Gtransfers/s bit rate, double today’s PCIe 3.0 specification, while preserving compatibility with software and mechanical interfaces and power envelope. One of the main factors in the wide adoption of the PCIe architecture is its sensitivity to high-volume manufacturing capabilities and materials such as FR4 boards and low-cost connectors, which will be key for PC, tablet and embedded designs that are not the target for NVLink, although it is expected to be used in Intel’s SkyLake and Knight’s Landing server chips with DDR4 memory in late 2015. The final PCIe 4.0 specifications, including form factor specification updates, are expected to be available in late 2015 says the PCI special interest group.
www.nvidia.com
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