Octal 14-bit, 125MSps µModule ADCs draw only 140mW per channel
The 80Msps LTM9009-14 and 105Msps LTM9010-14 consume 94mW per channel and 113mW per channel, respectively. Operating from 1.8V analog and digital supplies, the LTM9011 family includes a sleep mode that reduces power dissipation to just 2mW. Whether operating at full speed or in sleep mode, this ADC significantly lowers the power budget for high speed multichannel designs such as multiple-input multiple-output (MIMO) WiMAX/LTE, remote radio heads (RRH), military anti-jamming devices, radar, medical imaging and ultrasound applications.
Data is output from the LTM9011 in serial LVDS format to minimize the number of data lines. At 125Msps, each channel outputs two bits at a time, using two lanes per ADC. At sample rates below 62Msps, a one bit per channel option is available. The LTM9011 offers serial data communication and eight simultaneous sampling ADCs in a low profile 140-pin 11.25mm x 9mm BGA uModule package. In addition, the device integrates bypass capacitance and provides a flow-through pinout, reducing the required board area for routing data I/O lines and simplifying layout.
The LTM9011 includes an SPI-compatible interface that enables users to choose between a variety of data settings that reduce digital feedback and simplify design. Options include a data output randomizer that reduces digital feedback, seven programmable LVDS output current levels, internal 100Ohm LVDS output termination resistors, and digital output test patterns. These settings can be programmed via SPI or hard-wired for a reduced set of operating modes.
For more information at www.linear.com/product/LTM9011
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