OKI develops 124-layer PCB for semiconductor test
OKI Circuit Technology, part of the OKI Group, has successfully developed 124-layer PCB technology for wafer inspection equipment intended for next-generation high-bandwidth memory (HBM), such as that used in AI semiconductors.
This represents approximately a 15% increase in layers compared to conventional 108-layer PCB designs. OTC aims to establish mass production technology by October 2025 at its Joetsu Plant in Joetsu City, Niigata Prefecture. The plant boasts a proven track record along with advanced development and production capabilities in the field of high-multilayer, high-precision, large-format PCBs for semiconductor inspection equipment.
AI processing necessitates transmitting vast volumes of data between graphics processing unit (GPU) semiconductors and memory. As semiconductor performance increases, the memory installed must also possess high-speed, high-frequency, and high-density data transfer capabilities. HBM features a stacked DRAM structure, requiring technology capable of fabricating wafers even more thinly and precisely. This configuration also demands that the PCBs used in inspection equipment achieve even higher levels of performance and quality.
Since the latest semiconductors process an enormous number of signals and the number of wafer-mounted chips increases due to process miniaturisation, increasing density and more layers on the PCBs used in inspection equipment are necessary. However, PCB thickness has been limited to 7.6 mm due to various constraints, and 108 layers was the maximum limit with conventional technology. This time, by developing ultra-thin materials and tools, along with handling technologies suitable for these materials, and by introducing a proprietary automatic transport system for ultra-thin materials into its production line, OTC has successfully developed 124-layer PCB technology with a board thickness of 7.6 mm.
www.oki-otc.jp/en/products/test.html
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