Open-source RISC-V MCU with Bumblebee core

September 2, 2019

By eeNews Europe

The company will also provide complete toolchain support and development boards.

The new GD32VF103 series RISC-V MCU has been developed for general purpose use, balancing processing performance and resources. There are 14 models available, including QFN36, LQFP48, LQFP64 and LQFP100 packaging that is compatible in both software development and pin packaging.

The GD32VF103 MCU series uses the new Bumblebee processor core based on the open-source RISC-V instruction set architecture. It has been developed jointly by GigaDevice and China’s Nuclei System Technology. The Bumblebee supports custom instructions to optimise interrupt

handling. It features a 64-bit wide real-time timer, but can also generate timer interrupts defined in the RISC-V standard, with support of dozens of external interrupt sources, while possessing 16 interrupt levels and priorities, interrupt nesting and fast vector interrupts processing mechanism.

The device has two-levels of sleep mode. Its core supports standard JTAG interfaces and RISC-V debug standards for hardware breakpoints and interactive debugging. The Bumblebee core also supports the RISC-V standard compilation tool chain and Linux/Windows graphical IDEs.

The Bumblebee core has a two-stage variable-length pipeline microarchitecture with a streamlined dynamic branch predictor and instruction prefetch unit. It integrates a variety of low-power design methods.

The GD32VF103 MCU series operates at up to 153 DMIPS and achieves 360 performance points in the CoreMark test. This is a 15% performance improvement over the GD32 Cortex-M3 core. Dynamic power consumption is reduced by 50% and the standby power consumption is reduced by 25%.

More information

www.gigadevice.com

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