Optimizing embedded designs with configurable mixed-signal ICs and asynchronous state machines

Optimizing embedded designs with configurable mixed-signal ICs and asynchronous state machines

Technology News |
By Julien Happich

As a result, there are almost always comparators, op amps, level shifters, various logic and discrete transistors scattered across a design. These SoCs are almost never truly Systems on a Chip. In some cases, the support logic needed can be swept up into a low-end FPGA. But usually this is not a cost saving over discrete components. It is also an inadequate solution since an FPGA cannot address the analog or discrete components.

For an embedded device, this challenge will be even more pronounced as an MCU or SoC cannot address all the possible sensor, power, and connectivity options. This is further complicated by the fact that any one embedded device will be much lower-volume than an SoC for a mobile phone application. Therefore, a typical MCU or SoC vendor will not be justified in spending the large sums needed to design and fabricate a device to support all the necessary permutations and integrate the required surrounding support circuitry.

So, are designers forced to put up with sub-optimal designs with stray logic, overpriced analog and space-consuming discretes? Will the next generation of embedded devices surrender valuable space and be burdened by a bloated bill of materials?

The answer is happily “No”, thanks to the emergence of Configurable Mixed-Signal ICs (CMICs). These devices are a clever matrix of analog and digital circuit functions that are configurable through One-Time-Programmable (OTP) Non-Volatile Memory.

The pioneer and leader of this new category of devices is Silego Technology who introduced CMICs in 2009. Since then, Silego has completed over 1,300 customer designs and shipped over 2 billion configurable devices. Silego’s CMICs offer a variety of analog and digital resources that a designer can configure into mixed-signal circuits. These include asynchronous state machines, timing delays counters, pulse width modulators, comparators, voltage monitors, voltage references, ADCs, glue logic and level shifters.

Designers can drag and drop these resources and “wire up” their design in a schematic capture tool, or they can emulate the design with Silego’s hardware development kit. When they are satisfied with the design, they can program the CMIC device with the on-board OTP memory. CMICs can be used for a variety of essential mixed-signal functions ranging from motor and fan control, to sensor interfaces and power sequencing.

Cost and space savings

Replacing traditional discretes and analog, configurable mixed-signal ICs offer multiple benefits to embedded designers and manufacturers. While a dozen or more components can take up precious space which could be better used for a larger battery or a slimmer form factor, a CMIC can integrate several components into one tiny package ranging from 8-pin 1.0×1.2mm to 20-pin 2.0×3.0 STQFN footprint.

Traditional circuit prototyping requires days if not weeks to design a PCB, order components, fabricate the board, assemble, debug and repeat. In comparison, prototyping with a CMIC is much faster. Schematic capture, emulation and programming can be done in the same day. Changing a function is as easy as making the schematic change and programming a new part.

CMICs have been designed to reduce the bill of materials cost over discrete and analog components in most situations. A recent design profiled on highlighted that one single $0.35 CMIC part replaced $1.50 of level shift and comparator circuitry. Finally a discrete circuit with standard off the shelf components is easy to copy or clone. The CMIC circuitry inside is as secure as a full custom IC and only the designer or its designated ODM and supply chain partners can procure it.

When designing portable systems, size and battery life constraints are often the most severe challenges to overcome. One traditional way to pack a lot of functionality into a small size and power budget is to use a low power microcontroller such as TI’s popular MSP430. These types of ultra-low power microcontrollers offer high levels of flexibility and are available in small packages.

Silego Technology has taken a different approach in attacking this same problem, by adding a user programmable Asynchronous State Machine (ASM) macrocell to its fifth generation GreenPAK CMIC product family. The following comparisons illustrate design tradeoffs and tips that the user may consider when choosing between a variety of microcontroller options, and doing the same job using an ASM like the one inside a CMIC.

Handling MCU code

The CMIC’s Asynchronous State Machine contains 8 states and 24 possible decisions. The ASM represents an MCU program with up to 24 IF..THEN statements. When the 8 State ASM capabilities are considered together with hardware input and output circuits, the CMIC may be represented as being roughly equivalent to about 100 lines of standard C code written for common 8 and 16-bit MCUs.

As the name implies an ASM has no clock and is event driven, which means that when there are no events, the ASM stays in one state and consumes no static power. Thus, applications with limited input cycles can operate at leakage current power consumption well in to the single digit nanoamps of average current consumption at room temperature.


Handing embedded control problems

Typical embedded control problems usually involve a system that is transitioning through a set of discrete states based on asynchronous external inputs. ASMs are the natural problem solver for this. Silego has revived and modernized the ASM, mitigating the well-known hazard and race conditions, the programming/configuration headaches, while retaining all the inherent low-power, low-latency benefits for simple (up to 8 states) embedded control problems that would require less than 100 lines of code. 


Over kill microcontrollers v. CMIC ASM value

Microcontrollers contain a processor, program code, stack memory, and various peripherals. Microcontrollers can easily perform the application examples above but are inefficient in size and power. It is quite common to find MCUs designed into applications where less than 1% of the MCU horsepower will ever be used. A device such as a CMIC’s ASM is well suited to simple embedded control applications, especially ultra-lower power applications.

The GreenPack CMIC block diagram.

Interrupt latency down to nanoseconds

Designing a state machine on a microcontroller is typically done in software running on the microcontroller core. In this case, the states are implemented as points in the software instruction execution, and state transitions are implemented with conditional software branching. Microcontrollers have the capability to also process asynchronous inputs, and they do this through dedicated interrupt controller hardware, and through interrupt service routines (ISRs). The ISR is software that is run after a hardware interrupt has been activated. An important benchmark for microcontrollers is how short the time from an external interrupt signal is until the core is executing the first instruction of the ISR, the so-called interrupt latency. MCU interrupt latency in general purpose devices is usually measured in fast examples at around 5 to 10 microseconds.  

An ASM equivalent of interrupt latency is measured in nanoseconds – equivalent to the unclocked time of flight through the few gates between an external pin and the internal ASM input. The ASM has latency from one state to the next. If the CMIC is operating at a 5V power supply, the latency is a maximum of 50ns. Yes, ASMs are extremely fast and extremely low power.

VDD variation

A CMIC ASM works over a wide voltage range. A properly designed ASM is guaranteed hazard and race condition free because each ASM signal path is guaranteed by signal length and gate count. Thus, as the VDD changes, so does the propagation delay. However, the propagation delays are all matched and thus performance is guaranteed. Microcontrollers, on the other hand, are clocked with signals that are not correlated well with VDD. As the VDD changes, the MCU propagation delays change and since the timing doesn’t change, the timing margins are soon compromised. Chip designs react to these design hazards but putting the MCU under a voltage regulator or requiring still more performance to be lost by slowing the clock speed. However, the voltage regulator consumes power, and the slower clock speed increases interrupt latency.


Crash versus no crash

Design and system flaws can cause a microcontroller to crash. Poorly written software, timing issues, miscalculations of interrupt latency, running out of stack memory, memory leakages, and accidental writes in program memory are some common pitfalls that cause MCUs to crash.

Silego’s ASM is configured in hardware with NVM bits, has no timing issues, latency measured in nanosecond, no stack memory, no ability for memory leakage, and no ability to unintentionally over write program memory, and is therefore inherently more robust with VDD noise and brownouts.

No code GUI based tools versus typical MCU tools

A CMIC ASM is configured using the GreenPAK Designer development environment. The software appears to be a schematic capture editor instead of a coding tool. Most state machine designs can be implemented in a matter of minutes reducing the typical MCU tool learning curve from months to Silego’s GPAK learning curve of a few days.

Silego’s GreenPack CMICs.

In summary, a tiny CMIC with a 8 state ASM can take on a variety of embedded control applications that would formerly have been the exclusive domain of microcontrollers. The easily configured ASM brings key advantages of ultra-fast state transitions, leakage level static current consumption, robust design, and supply voltage tolerance so important in IoT, portable, mobile and embedded applications.

In addition, CMICs offer many benefits that will make embedded designers’ work easier and their products more profitable. They are the ideal solution because board space is tight and needs to be maximized to save space for other valuable functions (such as a bigger battery). They also make procurement happy by saving significantly over traditional analog and discrete while dramatically reducing the risk and stress involved.


About the author:

Michael Noonen is VP Sales and Business Development at Silego Technology – He can be reached at

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