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Ultra-low-power MRAM-based SoC for sensors/AI

Ultra-low-power MRAM-based SoC for sensors/AI

Technology News |
By Jean-Pierre Joosting



Numem, a leader in high-performance memory IP cores and memory chips/chiplets based on its patented NuRAM (MRAM) and SmartMem technologies, and IC’ALPS, a leader in ASIC/SoC design and supply chain management, have pooled their expertise to meet the challenge of developing an ambitious integrated circuit with RISC-V processors, 2MBytes of NuRAM and a DSP/AI Custom Datapath Accelerator.

The Custom SoC was developed in an advanced technology node. This SoC has been designed and implemented to highlight the Numem high-performance, low power memory subsystem with a RISC V Processor and AI Accelerator for ultra-low power applications. It has been developed through a close collaboration between Numem and IC’ALPS.

The physical implementation of this integrated circuit was made in a secure space (isolated location, network, and servers, and encrypted exchanges) to meet with the stringent protection of sensitive data required by this program.

“We were pleased with the collaboration and quality of service provided by IC’ALPS which made this on-time tape out possible and first time functional silicon” said Jack Guedj, CEO of Numem. “NuRAM with SmartMem is a high-performance memory subsystem which is 2-3x smaller and boast significant power reduction over SRAM”, he added.

“The challenges were numerous including — architecture, power domains, protection of the sensitive data, run times pushing improvement of EDA flow and the pressure of the tape out deadline”.

Numem and IC’Alps intend to extend their partnership to serve new SoC projects for customers.

www.numem.com
www.icalps.com

 

Further reading

Frontgrade Gaisler to design RISC-V processor for space
Red Semiconductor announces VISC extension to RISC-V
Renesas general-purpose 32-bit RISC-V MCUs with own core
MIPS RISC-V ecosystem supports early software development
Radiation-tolerant RISC-V-based SoC FPGAs for space applications

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