Partnership to enable open source ASIC manufacturing

Partnership to enable open source ASIC manufacturing

Market news |
By Ally Winning

The companies announced that design submissions are now being accepted for a series of Google-sponsored open source Multi-Project Wafer (MPW) shuttles that will run at SkyWater. Through the partnership with Google, say the companies, open source designs selected by the program will be fabricated at no cost to the designers.

The MPW program is enabled by the first foundry-supported open source process design kit (PDK) for 130-nm mixed-signal CMOS technologies (SKY130 process). The initiative, say the companies, will enable a complete open source manufacturing supply chain for custom application specific integrated circuits (ASICs).

“Google has a strong history of supporting open source silicon through being a founding member of both the RISC-V Foundation and the Linux Foundation’s CHIPS Alliance project,” says Parthasarathy Ranganathan, distinguished engineer, Google. “Working through its Open Source Programs Office (OSPO), Google is actively engaged in helping seed the open silicon space, specifically by providing funding, strategic, and legal support to key open hardware efforts including lowRISC and CHIPS Alliance.”

In support of the shuttle program, Efabless has released a complete Apache 2.0-licensed open source RTL2GDS design stack, referred to as openLANE, that supports the SKY130 PDK and is available to designers worldwide. With open source designs and a standardized test harness produced by Efabless that is open and freely available, verification results can be easily and cost-effectively replicated by other designers, enabling a new model to evaluate and iterate on ideas. This community-based model also brings a new and effective approach to product verification and security.

This offering, say the companies, has implications for accelerating innovation in the 130-nm mixed-signal SoC node popular for IoT type applications by removing barriers and obstacles relating to experimentation and collaboration for IC design. The model and its innovative outcomes are extensible to advanced nodes over time.

Mohamed Kassem, Efabless chief technology officer and co-founder says, “Launching the portal for design submission is a milestone in connecting a global community of experts who can openly collaborate to create and verify ASICs and supporting IP. The open source model multiplies the collaboration in semiconductor chip design. And this is just the start. Over time we expect to see advanced (and high quality) designs coming from the open source community.”

John Kent, SkyWater executive vice president of technology development and design enablement says, “We expect the new open source foundry PDK to serve as an excellent enablement engine for generating re-usable IP which will amplify idea generation and feed product development that is ongoing in the IoT and industrial space.”

More details about the design submission process and requirements can be found at or For more on the initiative, see a series of talks produced by the FOSSi (Free and Open Source Silicon) Foundation including presentations by Google and Efabless.


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