PCIe 4.0 clock compliance program delivers 100% test coverage
The company claims to be the only independent test lab providing 100% test coverage for all clock specifications in PCIe v4. All necessary PCIe compliance load boards have been developed in house to facilitate testing by easily connecting to product-evaluation boards provided by customers. Each PCIe Test Report evaluates a 100 MHz clock output from a device at one process, voltage, and temperature. All compliance results, plus related data and plots, are summarized in an easy to read PDF Compliance Statement.
JitterLabs developed a new methodology based on empirical modeling to remove jitter from the test environment. It uses this method to accurately extract the intrinsic jitter of a device, and provides 98% error bars to assess confidence in the methodology. The new method requires no additional hardware, is spread-spectrum agnostic, fulfills all PCI-SIG test requirements, and is scaleable for future generations.
Additional measurements (such as phase noise, power-supply induced jitter, spurious noise, and more), not required by PCI-SIG, are also included with each PCIe Test Report to provide a complete analysis. These measurements, and the PDF Compliance Statement, may be accessed, analyzed, and shared with other businesses online using the JitterLabs app.
JitterLabs – https://www.jitterlabs.com/services/test-reports#pcie
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